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TAS3208IPZP 数据表(PDF) 63 Page - Texas Instruments

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部件名 TAS3208IPZP
功能描述  DIGITAL AUDIO PROCESSOR WITH ANALOG INTERFACE
PDF  79 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TAS3208IPZP 数据表(HTML) 63 Page - Texas Instruments

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TAS3208
www.ti.com
SLES201E
– JANUARY 2007 – REVISED MARCH 2011
Table 26. Audio Data Format(1)
DIGITAL AUDIO I/O FORMAT
IM1/OM1
IM0/OM0
Left-justified
0
0
Right-justified
0
1
I2S
1
0
–
1
1
(1)
Default values are shown in italics.
Status Register (0x02)
The Status register provide memory load information. When a memory load error for a particular memory occurs,
the memory load error bit for that memory is set to 1. When a memory load is successful for a particular memory,
the memory load error bit for that memory is set to 0. The host must check this load status after memory load.
The host can clear all load error status by writing 0 to bits D40
–D32 of this register.
Table 27. Status Register
BIT
63
62
61
60
59
58
57
56
DESCRIPTION
0
0
0
0
0
0
0
0
Reserved
BIT
55
54
53
52
51
50
49
48
0
0
0
0
0
0
0
Reserved
BIT
47
46
45
44
43
42
41
40
0
0
0
0
0
0
0
0
Unsused
BIT
39
38
37
36
35
34
33
32
x
x
x
x
x
x
x
1
M8051 program memory load error
x
x
x
x
x
x
1
x
M8051 external memory load error
x
x
x
x
x
1
x
x
DSP program memory load error
x
x
x
x
1
x
x
x
DSP coefficient memory load error
x
x
x
1
x
x
x
x
DSP data memory load error
x
1
x
x
x
x
x
x
Invalid memory select
1
x
x
x
x
x
x
x
End of load header error
1
1
1
1
1
1
1
1
No EEPROM
0
0
0
0
0
0
0
0
No error
BIT
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
Reserved
BIT
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
Reserved
BIT
15
14
13
12
11
10
9
8
0
Reserved
BIT
7
6
5
4
3
2
1
0
0
Reserved
ABSY
Analog busy flag
0
Reserved
0
Reserved
0
Reserved
0
Reserved
BUSE
I2C bus error
0
Reserved
Bits 40
–32 define the memory load error status on EEPROM download and slave download.
Copyright
© 2007–2011, Texas Instruments Incorporated
Submit Documentation Feedback
63
Product Folder Link(s): TAS3208



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