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STM32F303VC 数据表(PDF) 118 Page - STMicroelectronics |
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STM32F303VC 数据表(HTML) 118 Page - STMicroelectronics |
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118 / 148 page  Electrical characteristics STM32F303xB STM32F303xC 118/148 DocID023353 Rev 13 Figure 36. 12-bit buffered /non-buffered DAC 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. tWAKEUP(3) Wakeup time from off state (Setting the ENx bit in the DAC Control register) CLOAD ≤50 pF, RLOAD ≥ 5 kΩ - 6.5 10 µs PSRR+ (1) Power supply rejection ratio (to VDDA) (static DC measurement CLOAD = 50 pF, No RLOAD ≥ 5 kΩ, -–67 –40 dB 1. Guaranteed by design. 2. Quiescent mode refers to the state of the DAC a keeping steady value on the output, so no dynamic consumption is involved. 3. Guaranteed by characterization results. Table 75. DAC characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit |
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