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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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TNETV2501INPGF 数据表(PDF) 13 Page - Texas Instruments |
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TNETV2501INPGF 数据表(HTML) 13 Page - Texas Instruments |
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13 / 197 page  Tables 13 December 2002 − Revised November 2008 SPRS206K Table Page 5−13 Synchronous DRAM Cycle Timing Requirements 154 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−14 Synchronous DRAM Cycle Switching Characteristics 154 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−15 EMIF.HOLD/HOLDA Timing Requirements 159 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−16 EMIF.HOLD/HOLDA Switching Characteristics 159 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−17 Reset Timing Requirements 160 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−18 Reset Switching Characteristics 160 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−19 External Interrupt and Interrupt Acknowledge Timing Requirements 162 . . . . . . . . . . . . . . . . . . . . . . . . 5−20 External Interrupt and Interrupt Acknowledge Switching Characteristics 162 . . . . . . . . . . . . . . . . . . . . . 5−21 XF Switching Characteristics 163 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−22 GPIO Pins Configured as Inputs Timing Requirements 164 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−23 GPIO Pins Configured as Outputs Switching Characteristics 164 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−24 PGPIO Pins Configured as Inputs Timing Requirements 165 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−25 PGPIO Pins Configured as Outputs Switching Characteristics 165 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−26 TIM0/TIM1/WDTOUT Pins Configured as Timer Input Pins Timing Requirements 166 . . . . . . . . . . . . . 5−27 TIM0/TIM1/WDTOUT Pins Configured as Timer Output Pins Switching Characteristics 166 . . . . . . . . 5−28 TIM0/TIM1/WDTOUT General-Purpose I/O Timing Requirements 167 . . . . . . . . . . . . . . . . . . . . . . . . . . 5−29 TIM0/TIM1/WDTOUT General-Purpose I/O Switching Characteristics 167 . . . . . . . . . . . . . . . . . . . . . . . 5−30 TIM0/TIM1/WDTOUT Interrupt Timing Requirements 168 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−31 McBSP Transmit and Receive Timing Requirements 169 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−32 McBSP Transmit and Receive Switching Characteristics 170 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−33 McBSP General-Purpose I/O Timing Requirements 172 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−34 McBSP General-Purpose I/O Switching Characteristics 172 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−35 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 0) 173 . . . . . . . . . . 5−36 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 0) 173 . . . . . . 5−37 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 0) 175 . . . . . . . . . . 5−38 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 0) 175 . . . . . . . 5−39 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 1) 176 . . . . . . . . . . 5−40 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 1) 176 . . . . . . 5−41 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 1) 178 . . . . . . . . . . 5−42 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 1) 178 . . . . . . . 5−43 HPI Read and Write Timing Requirements 179 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−44 HPI Read and Write Switching Characteristics 180 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−45 HPI General-Purpose I/O Timing Requirements 185 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−46 HPI General-Purpose I/O Switching Characteristics 185 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−47 HPI.HAS Interrupt Timing Requirements 186 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−48 I2C Signals (SDA and SCL) Timing Requirements 187 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−49 I2C Signals (SDA and SCL) Switching Characteristics 188 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−50 UART Timing Requirements 189 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−51 UART Switching Characteristics 189 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6−1 Thermal Resistance Characteristics (Ambient) 190 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6−2 Thermal Resistance Characteristics (Case) 191 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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