CS7654 datasheet(13/62 Pages) CIRRUS

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CS7654

INTERNAL PROCESSING

The internal operation of the CS7654 can be sepa-

rated into several distinct blocks. The following

section provides an overview of how these blocks

operate and interact.

Input Data Format and Chroma Separator

The CS7654 accepts up to 10-bit MYCG image

data from a CCD digitizer such as the CS7615.

The CS7654 internally converts the four-color

CCD MYCG interlaced image data into the various

color space formats. These include RGB and YUV,

as well as YCrCb. The individual image adjust-

ments are performed in the most appropriate color

space representation. Ultimately the image is con-

verted to YCrCb format for outputting digital data.

The same digital output data is also encoded in the

digital video encoder post processor section and

converted to analog NTSC or PAL.

White Balance and Gamma Correction

The red and blue color balances can be adjusted

through the I2C control port. During the AWB (au-

tomatic white balance) sequence the red level is ad-

justed

minimize

the

(Y-R)

difference

component; similarly the blue level is adjusted to

minimize the (Y-B) color difference component.

An automatic white balance is initiated by writing

a 1 to register 05h bit 1 at SA 0x34h. For manual

control, the red balance is accessed through register

08h, and the blue balance is accessed through reg-

ister 09h ( both at SA 0x34h).

Gamma correction is provided to offset the non-lin-

ear illumination profile of the display device. Sep-

arate 256 entry tables are supplied for red, green,

and blue. Each entry is 8-bits. The gamma table is

programmed through register 0Ch at SA 0x34h.

The write format is similar to the write format de-

scribed in the normal I2C operation section later in

this document. The first byte contains the CS7654

device address and write bit, the second byte con-

tains the CS7654 gamma table register address

(0Ch), the third byte determines which gamma

RAM to update (red, green, and blue), the next 256

bytes contain the gamma table entries.

The blue gamma RAM is selected by setting regis-

ter 0Ch bit 0 to a one; the green gamma RAM is se-

lected by setting register 0Ch bit 1 to a one; and the

red gamma RAM is selected by setting register 0Ch

bit 2 to a one. Any, or all of the gamma RAMs may

be selected . The most common implementation is

to write the same gamma table to all 3 RAMs by

setting bits 0-2 high. The gamma table itself is

loaded from low to high. The first byte after the

RAM selection byte will correspond to the value

used when the input data is 00h, the 256th byte after

the RAM selection byte will correspond to the val-

ue used when the input data is FFh.

The gamma table is read in a similar manner. How-

ever, certain restrictions are made to reads. First,

the gamma RAMs may only be read one at a time

(RAM selection byte = 01,02,04 only) and, second,

the gamma table may only be read when gamma

correction is disabled (register 05 bit2 = 0).

Chroma Kill

As the brightness of an image increases, the green,

yellow, cyan, and magenta pixels within the CCD

array will saturate at different intensity levels. As a

result, a highly illuminated object or light source

may start to look cyan. To overcome this effect, an

internal Chroma kill circuit compares the luma and

chroma values of each pixel to a set of programma-

ble thresholds. If the pixel’s luma value is greater

than the Y_THR value (register 27h at SA 0x34h )

and its Cr and Cb values are between the

CR_THR_H , CR_THR_L , CB_THR_H, and

CB_THR_L threshold values respectively, then

that pixel will lose its chroma value (become

white.) These thresholds are stored in registers 27h

- 2Ch at SA 0x34h.

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