CS7654 datasheet(48/62 Pages) CIRRUS

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CS7654

Flare Control 3 (29h at SA 0x34h)

Cb_L

[9:2]

Flare control filter Cb low threshold bits 9-2 (MSB). (Bits 1 and 0 set to 0.)

Flare Control 4 (2Ah at SA 0x34h)

Cr_H

[9:2]

Flare control filter Cr high threshold bits 9-2 (MSB).

Flare Control 5 (2Bh at SA 0x34h)

Cb_H

[9:2]

Flare control filter Cb high threshold bits 9-2 (MSB). (Bits 1 and 0 set to 0.)

Flare Control 6 (2Ch at SA 0x34h)

Cr_L

[1:0]

Flare control filter Cr low threshold bits 1 and 0.

Cb_L

[1:0]

Flare control filter Cb low threshold bits 1 and 0.

Cr_H

[1:0]

Flare control filter Cr high threshold bits 1 and 0.

Cb_H

[1:0]

Flare control filter Cb high threshold bits 1 and 0.

Scaler Control 1 (2Dh at SA 0x34h)

PLL_M

[4:0]

This is the PLL M value when the CUSTOM bit (bit 3 register 04h) is set.

BYPASS

[1:0]

See PLL section.

Scaler Control 2 (2Eh at SA 0x34h)

PLL_N

[4:0]

This is the PLL N value when the CUSTOM bit (bit 3 register 04h

at SA 0x34h) is set.

HALF

Sets the internal PLL reference clock to 1/2 the input clock.

76543210

Cb_L9

Cb_L8

Cb_L7

Cb_L6

Cb_L5

Cb_L4

Cb_L3

Cb_L2

R/W

76543210

Cr_H9

Cr_H

Cr_H7

Cr_H6

Cr_H5

Cr_H4

Cr_H3

Cr_H2

R/W

76543210

Cb_H9

Cb_H8

Cb_H7

Cb_H6

Cb_H5

Cb_H4

Cb_H3

Cb_H2

R/W

76543210

Cb_H1

Cb_H0

Cr_H1

Cr_H0

Cb_L1

Cb_L0

Cr_L1

Cr_L0

R/W

76543210

BYPASS1

BYPASS0

res

PLL_M4

PLL_M3

PLL_M2

PLL_M1

PLL_M0

R/W

Reserved

R/W

76543210

HALF

res

PLL_N4

PLL_N3

PLL_N2

PLL_N1

PLL_N0

R/W

Reserved

R/W

CS7654 数据表(PDF) 48 Page - Cirrus Logic

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CS7654 数据表(PDF) 48 Page - Cirrus Logic

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