CS7654 datasheet(49/62 Pages) CIRRUS

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CS7654

Scaler Control 3 (2Fh at SA 0x34h)

OFFSET

[7:0]

This value controls the offset fo the internal Scaler.

Configuration Control 0 (30h at SA 0x34h)

This register contains the 3 MSBs of the EEPROM address used when the SKIP bit is set (bit1 register 42h

at SA

0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 00h.

Configuration Control 1 (31h at SA 0x34h)

This register contains the 8 LSBs of the EEPROM start address used when the SKIP bit is set (bit1 register 42h

SA 0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 00h.

Configuration Control 2 (32h at SA 0x34h)

This register contains the 3 MSBs of the EEPROM address used when the SKIP bit is set (bit1 register 42h

at SA

0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 01h.

Configuration Control 3 (33h at SA 0x34h)

This register contains the 8 LSBs of the EEPROM start address used when the SKIP bit is set (bit1 register 42h

SA 0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 01h.

Configuration Control 4 (34h at SA 0x34h)

This register contains the 3 MSBs of the EEPROM address used when the SKIP bit is set (bit1 register 42h

at SA

0x34h) and the Configuration Index Register (43h at SA 0x34h) is set to 02h.

76543210

OFFSET7

OFFSET6

OFFSET5

OFFSET4

OFFSET3

OFFSET2

OFFSET1

OFFSET0

R/W

765

4321

res

SKP010

SKP09

SKP08

Reserved

R/W

765

4321

SKP07

SKP06

SKP05

SKP04

SKP03

SKP02

SKP01

SKP00

R/W

765

4321

res

SKP110

SKP19

SKP18

Reserved

R/W

765

4321

SKP17

SKP16

SKP15

SKP14

SKP13

SKP12

SKP11

SKP10

R/W

765

4321

res

SKP210

SKP29

SKP28

Reserved

R/W

CS7654 数据表(PDF) 49 Page - Cirrus Logic

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CS7654 数据表(PDF) 49 Page - Cirrus Logic

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