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CS7654 数据表(PDF) 44 Page - Cirrus Logic |
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CS7654 数据表(HTML) 44 Page - Cirrus Logic |
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44 / 62 page ![]() CS7654 44 Blue Balance Register (09h at SA 0x34h) BB[7:0] The Blue Balance register controls the blue contribution to the B-Y chrominance signal. When the register value is 00h, the blue contribution is minimized; when the register value is FFh, the blue contribution is maximized. When the AWB correction is in progress, this register value is adjusted such that the absolute magnitude of the B-Y signal is minimized. Red Saturation Register (0Ah at SA 0x34h) RS[7:0] The Red Saturation register value controls the amplitude of the R-Y chrominance signal. When the register value is 00h, the amplitude of the R-Y is minimized; when the register value is FFh, the amplitude of the R-Y is maximized. Blue Saturation Register (0Bh at SA 0x34h) BS[7:0] The Blue Saturation register value controls the amplitude of the B-Y chrominance signal. When the register value is 00h, the amplitude of the B-Y is minimized; when the register value is FFh, the amplitude of the B-Y is maximized. Gamma Correction Register (0Ch at SA 0x34h) Writing to the gamma register (0Ch at SA 0x34h) selects the R, G, and/or B RAM. Continuing data writes without sending a stop bit after the register write results in writes to the ram locations starting with 00h and continuing to FFh. Reads from register 0Ch function in a similar way. NOTE: All three gamma rams may be selected for simulta- neous writes, but read should be done one ram table at a time. GC0 Logic “1” selects BLUE gamma RAM for subsequent access. GC1 Logic “1” selects GREEN gamma RAM for subsequent ram access. GC2 Logic “1” selects RED gamma RAM for subsequent ram access. GC[0:7] Provide R/W access to RAM after gamma RAM table has been selected. Test Control A Register (0Eh at SA 0x34h) This register is reserved 76543210 BB7 BB6 BB5 BB4 BB3 BB2 BB1 BB0 R/W 76543210 RS7RS6 RS5 RS4 RS3RS2 RS1RS0 R/W 76543210 BS7 BS6 BS5 BS4 BS3 BS2 BS1 BS0 R/W 76543210 GC7 GC6 GC5 GC4 GC3 GC2 GC1 GC0 R/W |
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