5228-DS07-R datasheet(38/100 Pages) BOARDCOM

38 / 100 page

BCM5228

Data Sheet

7/12/04

Broa d c om Co rp o r a t i o n

Page 26

10BASE-T Mode

Document

5228-DS09-405-R

is used. The data is encoded using two-level NRZI instead of three-level MLT3. The data stream is not scrambled for fiber-

optic transmission. The stream cipher function is bypassed when 100BASE-FX mode is selected.

The external fiber-optic receiver detects signal status and communicate it to the BCM5228B or BCM5228F through the SD

pins. In this mode, the internal signal detect function is bypassed. The 100BASE-FX mode is automatically selected

whenever a valid differential signal is detected at the SD

± input pins. Pulling both SD+ and SD– low simultaneously disables

the 100BASE-FX mode.

10BASE-T MODE

The same magnetics module is used to interface the twisted-pair cable in 10BASE-T mode and in 100BASE-TX mode. The

data is two-level Manchester coded instead of three-level MLT3 and no scrambling/descrambling or 4B5B coding is

performed.

Data and clock rates are decreased by a factor of 10, with the RMII interface operating at 2.5 MHz.

ISOLATE MODE

Each transceiver in the BCM5228 can be isolated from the RMII/SMII/S3MII interface. When a transceiver is put into isolate

mode, all RMII/SMII/S3MII input pins (TXD0, TXD1, TX_EN, TX_ER, SSYNC, SMII_TXC) are ignored and all RMII/SMII/

S3MII output pins (CRS_DV, RX_ER, RXD0, RXD1, SMII_RSYNC, SMII_RXC) are set at high impedance. MII management

pins (MDC, MDIO,) and analog TD±, RD± pins operate normally. Writing a 1 to bit 10 of the MII Control register 0 puts the

port into isolate mode. Writing a 0 to the same bit removes it from isolate mode. Upon resetting the chip or resetting the

isolated port, the isolate mode is off.

SUPER ISOLATE MODE

When the chip is in super isolate mode, in addition to isolate mode actions, the chip also sets the analog TD± pins to high

impedance. Writing a 1 to bit 3 of the MII register 1Eh puts the port into super isolate mode. Writing a 0 to the same bit

removes it from super isolate mode. Upon resetting the chip or resetting the isolated port, the super isolate mode is off.

AUTO POWER-DOWN MODE

The BCM5228 supports a low power mode called auto power-down mode. Auto power-down mode is enabled by setting bit

5 of shadow register 1Bh. When in this mode, the BCM5228 automatically enters the low power mode if the energy from the

link partner is lost. Similarly, the next time energy is detected, the chip resumes full power mode. When the BCM5228 is in

this low power mode, it wakes up after approximately 2.5 to 5.0 seconds, as determined by bit 4 of shadow register 1Bh, and

sends a link pulse while monitoring energy from the link partner. If energy is detected, the BCM5228 enters full power mode

and establishes link with the link partner. Otherwise, the wake-up mode continues for a duration of approximately 40–600

milliseconds, as determined by bits [3:0] of shadow register 1Bh before going to low power mode. See Table43onpage 66

for details of various bits.

5228-DS07-R 数据表(PDF) 38 Page - Broadcom Corporation.

5228-DS07-R 数据表(HTML) 38 Page - Broadcom Corporation.

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