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5228-DS07-R 数据表(PDF) 72 Page - Broadcom Corporation. |
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5228-DS07-R 数据表(HTML) 72 Page - Broadcom Corporation. |
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72 / 100 page ![]() BCM5228 Data Sheet 7/12/04 Broa d c om Co rp o r a t i o n Page 60 Auxiliary Mode Register Document 5228-DS09-405-R AUXILIARY MODE REGISTER Activity LED Force Inactive. When set to 1, disables the Col LED, Transmit LED, Receive LED, and Activity LED. This bit has a lower priority than the Activity LED Force On, bit 5 of register 1Bh. Link LED Disable. When set to 1, disables the Link LED output pin. When 0, Link LED output is enabled. Block TXEN Mode. When this mode is enabled, short IPGs of 1, 2, 3, or 4 TXC cycles all result in the insertion of two idles before the beginning of the next packet’s JK symbols. Table 37: Auxiliary Mode Register (Address 29d, 1Dh) Bit Name R/W Description Default 15:5 Reserveda a. Preserve existing values of reserved bits by completing a Read/Modify Write. – –000h 4 Activity LED Force Inactive R/W 1 = Disable Col LED, Transmit LED, Receive LED, and Activity LED 0 = Enable above LEDs 0 3 Link LED Disable R/W 1 = Disable link LED output 0 = Enable link LED output 0 2 Reserveda – –0 1Block TXEN Mode R/W 1 = Enable block TXEN mode 0 = Disable block TXEN mode 0 0 Reserveda – –0 Note: R/W = Read/Write, RO = Read Only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear after read operation. |
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