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5228-DS07-R 数据表(PDF) 73 Page - Broadcom Corporation.

部件名 5228-DS07-R
功能描述  10/100BASE-TX/FX Octal Transceiver
PDF  100 Pages
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制造商  BOARDCOM [Broadcom Corporation.]
网页  http://www.broadcom.com
标志 BOARDCOM - Broadcom Corporation.

5228-DS07-R 数据表(HTML) 73 Page - Broadcom Corporation.

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Data Sheet
BCM5228
7/12/04
Broa d c om Co rp o r a t i o n
Document
5228-DS09-405-R
Auxiliary Multiple PHY Register
Page 61
AUXILIARY MULTIPLE PHY REGISTER
HCD. Bits 15:11 of the Auxiliary Multiple PHY register are 5 read-only bits that report the highest common denominator
(HCD) result of the auto-negotiation process. Immediately upon entering the Link Pass state after each reset or restart auto-
negotiation, only 1 of these 5 bits is 1. The Link Pass state is identified by a 1 in bit 6 or 7 of this register. The HCD bits are
reset to 0 every time auto-negotiation is restarted or the BCM5228 is reset.
For their intended application, these bits uniquely identify the HCD only after the first link pass after reset or restart of auto-
negotiation. If the ability of the link partner is different on later link fault and subsequent renegotiations, more than one of the
above bits may be active.
Restart Auto-Negotiation. A self-clearing bit that allows the auto-negotiation process to be restarted, regardless of
the current status of the state machine. For this bit to work, auto-negotiation must be enabled. Writing a 1 to this
bit restarts auto-negotiation. Because the bit is self-clearing, it always returns a 0 when read. The operation of this
bit is identical to bit 9 of the Control register.
Auto-Negotiation Complete. This read-only bit returns a 1 after the auto-negotiation process has been completed. It
remains 1 until the auto-negotiation process is restarted, a link fault occurs, or the chip is reset. If auto-negotiation is disabled
or the process is still in progress, the bit returns a 0.
Table 38: Auxiliary Multiple PHY Register (Address 30d, 1Eh)
Bit
Name
R/W
Description
Default
15
HCD_TX_FDX
RO
1 = Auto-negotiation result is 100BASE-TX full-duplex
0
14
HCD_T4
RO
1 = Auto-negotiation result is 100BASE-T4
0
13
HCD_TX
RO
1 = Auto-negotiation result is 100BASE-TX
0
12
HCD_10BASE-T_FDX
RO
1 = Auto-negotiation result is 10BASE-T full-duplex
0
11
HCD_10BASE-T
RO
1 = Auto-negotiation result is 10BASE-T
0
10:9
Reserveda
a. Preserve existing values of reserved bits by completing a “Read/Modify Write.”
––
00
8
Restart Auto-Negotiation
R/W
(SC)
1 = Restart auto-negotiation process
0 = No effect
0
7
Auto-Negotiation Complete
RO
1 = Auto-negotiation process completed
0 = Auto-negotiation process not completed
0
6
Acknowledge Complete
RO
1 = Auto-negotiation acknowledge completed
0
5
Acknowledge Detected
RO
1 = Auto-negotiation acknowledge detected
0
4
Ability Detect
RO
1 = Auto-negotiation waiting for LP ability
0
3
Super Isolate
R/W
1 = Super isolate mode
0 = Normal operation
0
2
Reserveda
––
0
1
10BASE-T Serial Mode
R/W
1 = Enable 10BASE-T serial mode
0 = Disable 10BASE-T serial mode
0
0
Reserveda
––
0
Note: R/W = Read/Write, RO = Read Only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear
after read operation.



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