数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

5802-DS02-R 数据表(PDF) 41 Page - Broadcom Corporation.

部件名 5802-DS02-R
功能描述  Single-Chip Security Processor
PDF  50 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  BOARDCOM [Broadcom Corporation.]
网页  http://www.broadcom.com
标志 BOARDCOM - Broadcom Corporation.

5802-DS02-R 数据表(HTML) 41 Page - Broadcom Corporation.

Back Button 5802-DS02-R Datasheet HTML 37Page - Broadcom Corporation. 5802-DS02-R Datasheet HTML 38Page - Broadcom Corporation. 5802-DS02-R Datasheet HTML 39Page - Broadcom Corporation. 5802-DS02-R Datasheet HTML 40Page - Broadcom Corporation. 5802-DS02-R Datasheet HTML 41Page - Broadcom Corporation. 5802-DS02-R Datasheet HTML 42Page - Broadcom Corporation. 5802-DS02-R Datasheet HTML 43Page - Broadcom Corporation. 5802-DS02-R Datasheet HTML 44Page - Broadcom Corporation. 5802-DS02-R Datasheet HTML 45Page - Broadcom Corporation. Next Button
Zoom Inzoom in Zoom Outzoom out
 41 / 50 page
background image
Production Specification
BCM5802
07/03/02
B roa dcom Co rpo rat ion
Document
5802-DS03-405-R
Invalid Encryption/Authentication Operations
Page 33
INVALID ENCRYPTION/AUTHENTICATION OPERATIONS
This section details scenarios that the software should never request the chip to process. These can cause unknown results
being written to memory, or possibly a chip hang condition.
Zero-length packets: These can arise in several ways, all of which should be avoided. One way is to have a zero total
packet length in a MCR structure. Another is to have a non-zero packet length, but to set the crypto offset equal to or
greater than the entire length of the packet.
Zero-length descriptors: All data buffer entries in input and output descriptor chains should have a non-zero length.
Similarly, requesting the chip to use a zero output fragment size from the output fragment register would lead to
unpredictable results.
Erroneous parameter specifications: Situations such as illegal authentication specifiers, misaligned structure members,
and misaligned output packet payload data, should be guaranteed to never occur.
Output descriptors that point to misaligned output data buffers: All output data should be aligned on 32-bit boundaries.
Output descriptors that indicate an output buffer byte length that is not a multiple of four: All output data buffers must
have a length that is multiple of 32-bits.
Non-zero crypto offset with crypto disabled.
Packets with both authentication and crypto disabled.
Packets with crypto disabled, but with an output descriptor chain of length > 1 specified: For packets that have no crypto
output (hence must have an authentication output), there must be one, and exactly one output descriptor specified in
the Master Command Record. Only the next field of this descriptor is used to write out the HMAC codes. Other fields of
this descriptor (in particular the data buffer address and size) are ignored.
Incorrect packet size for cryptography: Whenever 3DES is enabled, the length of input data to be encrypted must be a
multiple of eight bytes. The input data length is calculated as total packet size minus the number of 32-bit dwords
specified by the crypto offset context field. Giving the chip a crypto data length that is not a multiple of eight bytes could
hang the chip. IPsec padding guarantees that this never happens.
Crypto offset that leads to a data length for encryption or decryption that is not multiple of 64-bits: For instance, a crypto
offset of one word with a total packet length of 40 words would force the crypto unit to process 39 words, which is not a
multiple of eight bytes. However, a crypto offset of one word with a packet length of 41 words is fine, as is a crypto offset
of two words with a packet length of 40 words.
Non-zero crypto offset for packets that do not have both crypto and authentication enabled: If authentication is disabled,
the crypto offset must be set to zero. Crypto offset can not be used as a programmable skip length for crypto-only
packets.
Writing to the MCR register with PCI master mode disabled: Doing so causes the control microcode to start processing
and hang, waiting for a PCI master mode access that never begins.
The #Packet or #Key Setup in the first field in an MCR cannot be zero.
The Flags field (second field) in an MCR must be zeroed out before sending the MCR pointer to DMA register on the
BCM5802.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com