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5802-DS02-R 数据表(PDF) 43 Page - Broadcom Corporation. |
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5802-DS02-R 数据表(HTML) 43 Page - Broadcom Corporation. |
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43 / 50 page ![]() Production Specification ■ BCM5802 07/03/02 B roa dcom Co rpo rat ion Document 5802-DS03-405-R BCM5802 Registers Page 35 The various registers within PCI configuration space are as follows. Table 27: PCI Configuration Registers Bits Access Reset Purpose PCI Vendor ID: 0x00 15:0 RO 14E4 Hard-wired device identifier (0x14E4), Broadcom ID assigned by PCISIG. PCI Device ID: 0x02 31:16 RO 5802 Hard-wired device identifier (0x5802). PCI Command Register: 0x04 15:10 RSVD 0 Reserved. 9 RW 0 Fast back to back master enable. 8 RW 0 System error enable. 7 RSVD 0 Reserved. 6 RW 0 Parity error enable. 5 RSVD 0 Reserved. 4 RW 0 Memory write and Invalidate enable. 3 RSVD 0 Reserved. 2 RW 0 Bus master enable. 1 RW 0 Memory access enable. 0 RW 0 I/O access enable (ignored, leave at 0). PCI Status Register: 0x04 31 RO 0 Detect parity error. 30 RO 0 Signaled system error. 29 RO 0 Received master abort status. 28 RO 0 Received target abort status. 27 RO 0 Signaled target abort status. 26:25 RO 01 DEVSEL timing. 24 RO 0 Data parity detected. 23 RO 1 Fast back-to-back capable status. 22 RSVD 0 Reserved. 21 RO 0 66-MHz capable. 20:16 RSVD 0 Reserved. PCI Rev ID: 0x08 7:0 RO 01/E1 Hard-wired device revision identifier (0x01 for domestic version and 0xE1 for export version). |
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