AD6624ASSLASHPCB datasheet(3/40 Pages) AD

3 / 40 page

REV. 0

AD6624A

–3–

SPECIFICATIONS (VDD = 2.5 V 5%, VDDIO = 3.3 V 10%. All specifications T

A = TMIN to TMAX, unless otherwise noted.)

ELECTRICAL CHARACTERISTICS

Test

AD6624AS

Parameter (Conditions)

Temp

Level

Min

Typ

Max

Unit

LOGIC INPUTS (5 V TOLERANT)

Logic Compatibility

Full

3.3 V CMOS

Logic “1” Voltage

Full

2.0

5.0

Logic “0” Voltage

Full

–0.3

+0.8

Logic “1” Current

Full

µA

Logic “0” Current

Full

µA

Input Capacitance

°CV

LOGIC OUTPUTS

Logic Compatibility

Full

3.3 V CMOS/TTL

Logic “1” Voltage (IOH = 0.25 mA)

Full

2.4

VDD – 0.2

Logic “0” Voltage (IOL = 0.25 mA)

Full

0.2

0.4

IDD SUPPLY CURRENT

CLK = 100 MHz, (VDD = 2.75 V, VDDIO = 3.6 V)

Full

IVDD

545

IVDDIO

CLK = GSM Example (65 MSPS, VDD = 2.5 V,

VDDIO = 3.3 V, Dec = 2/10/6 120 Taps 4 Channels)

°CV

IVDD

250

IVDDIO

POWER DISSIPATION

CLK = 80 MHz TD-SCDMA

Full

1.1

CLK = 65 MHz GSM/EDGE Example

700

Sleep Mode

Full

287

µW

Specifications subject to change without notice.

RECOMMENDED OPERATING CONDITIONS

Test

AD6624AS

Parameter

Level

Min

Typ

Max

Unit

VDD

2.375

2.5

2.675

VDDIO

3.0

3.3

3.6

TAMBIENT

–40

+25

+70

°C

AD6624AS/PCB 数据表(PDF) 3 Page - Analog Devices

AD6624AS/PCB 数据表(HTML) 3 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

数据表下载

链接网址

AD6624AS/PCB 数据表(PDF) 3 Page - Analog Devices

AD6624AS/PCB 数据表(HTML) 3 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

数据表 下载

链接网址

数据表下载