AD6624ASSLASHPCB datasheet(16/40 Pages) AD

16 / 40 page

REV. 0

AD6624A

–16–

The RSSI output of the AD6600 numerically grows with increasing

signal strength of the analog input (RSSI = 5 for a large signal,

RSSI = 0 for a small signal). When the Exponent Invert Bit

(ExpInv) is set to zero, the AD6624A will consider the smallest

signal at the IN[13:0] to be the largest and as the EXP word

increases, it shifts the data down internally (EXP = 5 will shift a

14-bit word right by five internal bits before passing the data to

the rCIC2). In this example, where ExpInv = 0, the AD6624A

regards the largest signal possible on the AD6600 as the smallest

signal. Thus, the Exponent Invert Bit can be used to make the

AD6624A exponent agree with the AD6600 RSSI. By setting

ExpInv = 1, it forces the AD6624A to shift the data up (left) for

growing EXP instead of down. The exponent invert bit should

always be set high for use with the AD6600.

The Exponent Offset is used to shift the data right. For example,

Table I shows that with no rCIC2 scaling, 12 dB of range is lost

when the ADC input is at the largest level. This is undesirable

because it lowers the Dynamic Range and SNR of the system by

reducing the signal of interest relative to the quantization noise floor.

Table I. AD6600 Transfer Function with AD6624A ExpInv = 1,

and No ExpOff

ADC Input

AD6600

AD6624A

Signal

Level

RSSI[2:0]

Data

Reduction

Largest

101 (5)

4 (>> 2)

–12 dB

100 (4)

8 (>> 3)

–18 dB

011 (3)

16 (>> 4)

–24 dB

010 (2)

32 (>> 5)

–30 dB

001 (1)

64 (>> 6)

–36 dB

Smallest

000 (0)

128 (>> 7)

–42 dB

(ExpInv = 1, ExpOff = 0)

To avoid this automatic attenuation of the full-scale ADC

signal, the ExpOff is used to move the largest signal (RSSI = 5)

up to the point where there is no downshift. In other words,

once the Exponent Invert bit has been set, the Exponent Offset

should be adjusted so that mod(7–5 + ExpOff,8) = 0. This is

the case when Exponent Offset is set to 6 since mod(8,8) = 0.

Table II illustrates the use of ExpInv and ExpOff when used

with the AD6600 ADC.

Table II. AD6600 Transfer Function with AD6624A ExpInv = 1,

and ExpOff = 6

ADC Input

AD6600

AD6624A

Signal

Level

RSSI[2:0]

Data

Reduction

Largest

101 (5)

1 (>> 0)

–0 dB

100 (4)

2 (>> 1)

–6 dB

011 (3)

4 (>> 2)

–12 dB

010 (2)

8 (>> 3)

–18 dB

001 (1)

16 (>> 4)

–24 dB

Smallest

000 (0)

32 (>> 5)

–30 dB

(ExpInv = 1, ExpOff = 6)

This flexibility in handling the exponent allows the AD6624A

to interface with gain-ranging ADCs other than the AD6600.

The Exponent Offset can be adjusted to allow up to seven

RSSI(EXP) ranges to be used as opposed to the AD6600’s five.

Input Data Scaling

The AD6624A has two data input ports: an A Input Port and a

B Input Port. Each accepts 14-bit mantissa (two’s-complement

integer) IN[13:0], a 3-bit exponent (unsigned integer) EXP[2:0]

and the Input Enable (IEN). Both inputs are clocked by CLK.

These pins allow direct interfacing to both standard fixed-point

ADCs such as the AD9225 and AD6640, as well as to gain-

ranging ADCs such as the AD6600. For normal operation with

ADCs having fewer than 14 bits, the active bits should be MSB-

justified and the unused LSBs should be tied low.

The 3-bit exponent, EXP[2:0], is interpreted as an unsigned

integer. The exponent will subsequently be modified by either of

the 5-bit scale values stored in register 0x92, Bits 4–0 or Bits 9–5.

These 5-bit registers contain the sum of the rCIC2 scale value plus

the external attenuator scale settings and the Exponent Offset

(ExpOff). If no external attenuator is used, these values can only

be set to the value of the rCIC2 scale. If an external attenuator is

used, Bit Position 4–0 (Register 0x92 rCIC2_LOUD[4:0]) con-

tains the scale value for the largest input range. Bit Positions

9–5 (Register 0x92 rCIC2_QUIET[4:0]) are used for the nonat-

tenuated input signal range.

Scaling with Fixed-Point ADCs

For fixed-point ADCs, the AD6624A exponent inputs EXP[2:0]

are typically not used and should be tied low. The ADC outputs

are tied directly to the AD6624A Inputs, MSB-justified. The

ExpOff bits in 0x92 should be programmed to 0. Likewise, the

Exponent Invert bit should be 0.

Thus for fixed-point ADCs, the exponents are typically static

and no input scaling is used in the AD6624A.

D11 (MSB)

AD6640

D0 (LSB)

AD6624A

IN13

IN2

IN1

IN0

IEN

EXP2

EXP1

EXP0

VDD

NOTE:

EXPOFF = 0, EXPINV = 0

Figure 24. Typical Interconnection of the AD6640 Fixed

Point ADC and the AD6624A

Scaling with Floating-Point or Gain-Ranging ADCs

An example of the exponent control feature combines the AD6600

and the AD6624A. The AD6600 is an 11-bit ADC with three bits

of gain ranging. In effect, the 11-bit ADC provides the mantissa,

and the three bits of relative signal strength indicator (RSSI) for

the exponent. Only five of the eight available steps are used by

the AD6600. See the AD6600 data sheet for additional details.

For gain-ranging ADCs such as the AD6600,

scaled input

ExpInv

ExpWeight

Exp rCIC

– mod( –

=×

72 8

(1)

where: IN is the value of IN[13:0], Exp is the value of EXP[2:0],

and rCIC2 is the rCIC scale register value (0x92 Bits 9–5 and 4–0).

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