LPC47M14X datasheet(75/205 Pages) SMSC

75 / 205 page

SMSC DS – LPC47M14X

Page 75

Rev. 03/19/2001

Table 37 – MIDI Receive Buffer Empty Status Bit

STATUS PORT

DESCRIPTION

MIDI Read/Command Acknowledge data is

available to the host.

MIDI Read/Command Acknowledge data is

NOT available to the host.

Bit 6 – MIDI Transmit Busy

Bit 6 MIDI Transmit Busy indicates the send (write) state of the MIDI Data port and Command port (Table 38)

There are no interrupts associated with MIDI transmit (write) data.

Table 38 – MIDI Transmit Busy Status Bit

STATUS PORT

DESCRIPTION

The MPU-401 interface is ready to accept a

data/command byte from the host.

The MPU-401 interface is NOT ready to

accept a data/command byte from the host.

Bits[5:0]

RESERVED (Reserved bits cannot be written and return ‘0’ when read).

Command Port

The Command port is used to transfer MPU-401 commands to the Command Controller. The Command port is write-

only (Table 39). See Section “MPU-401 Command controller” below.

Table 39 – MPU-401 Command Port

MPU-401 I/O BASE ADDRESS+1

DEFAULT

TYPE

n/a

NAME

COMMAND REGISTER

Interrupt

The MPU-401 IRQ is asserted (‘1’) when either MIDI receive data or a command acknowledge byte is available tot he

host in the MIDI data register (FIGURE 4). the IRQ is deasserted (‘0’) when the host reads the MIDI Data port.

Note: If, following a host read, data is still available in the 16C550A Receive FIFO, the IRQ will remain asserted (‘1’).

The IRQ is enabled when the ‘Activate’ bit in the MPU-401 configuration registers logical device block is asserted ‘1’.

If the Activate bit is deasserted ‘0’, the MPU-401 IRQ cannot be asserted (see Section “MPU-401 Configuration

Registers”).

The MPU-401 IRQ is not affected by MIDI write data, 16C550A transmit-related functions or Receiver Line Status

interrupts.

The factory default Sound Blaster 16 MPU-401 IRQ is 5.

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