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STPMIC1 数据表(PDF) 122 Page - STMicroelectronics |
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STPMIC1 数据表(HTML) 122 Page - STMicroelectronics |
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122 / 140 page ![]() 6.7.5 NVM BUCKs voltage output shadow register (NVM_BUCKS_VOUT_SHR) Table 69. NVM_BUCKS_VOUT_SHR 7 6 5 4 3 2 1 0 BUCK4_VOUT[1:0] BUCK3_VOUT[1:0] BUCK2_VOUT[1:0] BUCK1_VOUT[1:0] R/W R/W R/W R/W R/W R/W R/W R/W Address: 0xFC Type: read write register Default: depends on part number refer to Table 64. NVM shadow register map Description: NVM Bucks VOUT register. [7:6] BUCK4_VOUT[1:0]: Buck4 default output selection 00: 1.15 V 01: 1.2 V 10: 1.8 V 11: 3.3 V [5:4] BUCK3_VOUT[1:0]: Buck3 default output selection 00: 1.2 V 01: 1.8 V 10: 3.0 V 11: 3.3 V [3:2] BUCK2_VOUT[1:0]: Buck2 default output selection 00: 1.1 V 01: 1.2 V 10: 1.35 V 11: 1.5 V [1:0] BUCK1_VOUT[1:0]: Buck1 default output selection 00: 1.1 V 01: 1.15 V 10: 1.2 V 11: 1.5 V STPMIC1 NVM shadow registers DS12792 - Rev 7 page 122/140 |
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