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ADE1201 数据表(PDF) 20 Page - Analog Devices |
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ADE1201 数据表(HTML) 20 Page - Analog Devices |
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20 / 40 page ![]() ADE1201 Data Sheet Rev. 0 | Page 20 of 40 COMPARATOR OUTPUT DEBOUNCE FILTER COUNTER DEBOUNCE FILTER OUTPUT DEBOUNCE FILTER COUNTER UP/DOWN MODE UP/CLEAR MODE DEBOUNCE FILTER OUTPUT TIME TIME TIME FILTER LENGTH FILTER LENGTH TIME TIME Figure 29. Debounce Filter Function Example INVALID MODE The register protection feature must be disabled when configuring the ADE1201 (see the Protecting the Integrity of Configuration Registers section). During this time, the state of the DOUT1 pin does not reflect the state of the inputs on the IN1 pin, and the IC is in invalid mode. The IC remains in this mode until the register protection is enabled. During invalid mode, the ADE1201 output on the DOUT1 pin is set based on Bits[5:4] (INVALID_MODE) and Bit 3 (FORCEVAL) of the BIN_CTRL register. If the INVALID_MODE bits are equal to 00, the DOUT1 filter output is set to the value configured in the FORCEVAL bit in the BIN_CTRL register. If the bits are equal to 01, the DOUT1 filter output is set to the DOUT1 output from the digital datapath. If the bits are equal to 10, the DOUT1 filter output toggles the value the bits had upon entering invalid mode. If the bits are equal to 11, the DOUT1 filter output holds the current value. PROGRAMMABLE LOAD CURRENT The ADE1201 programmable load current block diagram is shown in Figure 30. The input impedance of the programmable load is given in Table 1. When the programmable load is disabled with the PL_EN register, Bit 15 and Bit 14 = 00, and the external FET is conducting, the load sinks ~100 µA. ADE1201 29kΩ LOAD1 GNDF Figure 30. Programmable Load Current Block Diagram A high voltage digital input is presented to the ADE1201 application circuit, as shown in Figure 20. When the digital input switches on to a high voltage state, the ADE1201 injects a pulsed current load for a user defined period of time based on the PL_HIGH_TIME register, and then switches to a constant current. The pulsed current is sometimes called a wetting current and removes oxidation from the digital input contacts, as well as minimizes the effects of surge and electrical fast transients. To calculate the value to write to the HIGH_CODE bits (Bits[9:0]) of the PL_HIGH_CODE register to configure the pulsed current, use the following equation: HIGH_CODE = Pulsed Current/0.2 (2) where Pulsed Current is the desired current level expressed in mA. The resolution of the pulsed current is 0.2 mA per LSB. The maximum current is (210 − 1) × 0.2 = 204.6 mA. The recommended range of the pulsed current is between 20 mA and 200 mA, and HIGH_CODE = 100 decimal to 1023 decimal. The minimum current is 0.2 mA and HIGH_CODE = 1. The pulsed current is applied for a time period set in Bits[11:0] (HIGH_TIME) in the PL_HIGH_TIME register. To determine the value to write to the HIGH_TIME bit field based on the desired period of the pulse, use the following equation: HIGH_TIME = Pulsed Current Period/10 (3) where Pulsed Current Period is the desired time period expressed in µs. The resolution of the pulsed current period is 10 µs. The maximum period is (212 − 1) × 10 (µs) = 40.95 ms. After the pulsed current period, the programmable load switches to a constant current level set in the LOW_CODE bits (PL_LOW_CODE register, Bits[5:0]). To determine the value to write to the LOW_CODE bit field, use the following equation: LOW_CODE = Constant Current/0.1 (4) where: Constant Current is the desired current level expressed in mA. The resolution of the constant current is 0.1 mA per LSB. The maximum current that can be set is (26 − 1) × 0.1 = 6.3 mA. |
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