ADP1034ACPZ-1-R7 datasheet(28/41 Pages) AD

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Data Sheet

ADP1034

THEORY OF OPERATION

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Rev. 0 | 28 of 41

BUCK REGULATOR

Buck Regulator Operation

The step down dc-to-dc (or buck) regulator in the ADP1034 uses

a current mode controlled scheme, operating at a fixed frequency

set by an internal oscillator. Current mode uses a fast inner current

controlled loop to regulate peak inductor current and a slower outer

loop to adjust the current loop to regulate the output voltage. At

the start of each oscillator cycle, the high-side MOSFET switch

turns on, applying the input voltage to one end of the inductor.

The voltage across the inductor causes the buck regulator inductor

current (IL_BUCK) to increase until the current sense signal crosses

the peak inductor current threshold that turns off the MOSFET

switch. The error amplifier output sets this threshold. During the

high-side MOSFET off time, the inductor current declines through

the low-side MOSFET switch until either the next oscillator clock

pulse starts a new cycle that results in continuous conduction

mode (CCM) operation, or the inductor current reaches zero. The

low-side MOSFET switch turns off, and the control system waits

for the next oscillator clock pulse to start a new cycle, resulting in

discontinuous mode (DCM) operation. Under light load conditions,

the regulator can skip pulses to maintain regulation and increase

power conversion efficiency.

Buck Regulator UVLO

The step down regulator of theADP1034 features an internal un-

dervoltage lockout circuit that monitors the input voltage to the

regulator or VOUT1. If the voltage at VOUT1 drops below the

internal threshold level of 4.5 V, the regulator turns off. If the output

at VOUT1 rises above the internal threshold, the regulator soft start

period initiates, and the regulator enables.

Buck Regulator Soft Start

The step down regulator in the ADP1034 includes soft start circuitry

that ramps the output voltage in a controlled manner during startup,

thereby limiting the inrush current.

Buck Regulator Current-Limit Protection

The step down regulator in the ADP1034 includes a current-limit

protection circuit to limit the amount of forward current through the

high-side MOSFET switch. The inductor peak current is monitored

cycle by cycle to detect an overload condition. When the overload

condition occurs, the current-limit protection limits the peak inductor

current to ILIM (BUCK), resulting in a drop in the output voltage.

Buck Regulator OVP

The step down regulator of the ADP1034 features an OVP circuit

that monitors the output voltage. If the voltage on the VOUT2

pin exceeds the nominal output voltage by 10%, the step down,

dc-to-dc regulator stops switching until the voltage falls below the

threshold again.

Buck Regulator Active Pull-Down Resistor

The buck regulator has an active pull-down resistor that discharges

the output capacitor when the output of VOUT1 is between 1.23 V

and 4.5 V. The pull-down resistor connects between VOUT2 and

SGND2.

INVERTING REGULATOR

Inverting Regulator Operation

The inverting dc-to-dc regulator in the ADP1034 uses a current

mode controlled scheme, operating at a fixed frequency set by an

internal oscillator. Current mode uses a fast inner current controlled

loop to regulate the peak inductor current and a slower outer loop

to adjust the current loop to regulate the output voltage. At the start

of each oscillator cycle, the high-side MOSFET switch turns on,

applying the input voltage to one end of the inductor, which normal-

ly causes the inverting regulator inductor current (IINV_INDUCTOR) to

increase until the current sense signal crosses the peak inductor

current threshold that turns off the MOSFET switch. The error am-

plifier output sets this threshold. During the high-side MOSFET off

time, the inductor current declines through the low-side MOSFET

switch until one of the following occurs:

►

The next oscillator clock pulse starts a new cycle, which results

in CCM operation.

►

The inductor current reaches zero, the low-side MOSFET switch

is turned off, and the control system waits for the next oscillator

clock pulse to start a new cycle, resulting in DCM operation.

Under light load conditions, the regulator can skip pulses to main-

tain regulation and increase power conversion efficiency.

Inverting Regulator UVLO

The inverting dc-to-dc regulator of the ADP1034 features an inter-

nal UVLO circuit that monitors the input voltage to the regulator

or the VOUT1. If the voltage at VOUT1 drops below the internal

threshold level of 4.5 V, the regulator turns off. If the output of

VOUT1 rises above the internal threshold, the regulator soft start

period initiates, and the regulator enables.

Inverting Regulator Soft Start

The inverting, dc-to-dc regulator in the ADP1034 includes soft start

circuitry that ramps the output voltage in a controlled manner during

startup, thereby limiting the inrush current.

Inverting Regulator Current-Limit Protection

The inverting dc-to-dc regulator in the ADP1034 includes a cur-

rent-limit protection circuit to limit the amount of forward current

through the high-side MOSFET switch. The inductor peak current

is monitored cycle by cycle to detect an overload condition. When

the overload condition occurs, the current-limit protection limits the

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