| 数据搜索系统,热门电子元器件搜索 |
|
ADP1034ACPZ-1-R7 数据表(PDF) 22 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADP1034ACPZ-1-R7 数据表(HTML) 22 Page - Analog Devices |
|
22 / 41 page ![]() Data Sheet ADP1034 TYPICAL PERFORMANCE CHARACTERISTICS analog.com Rev. 0 | 22 of 41 Figure 59. Inverting Regulator Load Transient Response, VVINP = 24 V, VOUT1 = 24 V, IOUT1 = 0 mA, VOUT2 = 5 V, IOUT2 = 0 mA, VOUT3 = −15 V, IOUT3 = −0.3 mA to −7 mA Step, TA = 25°C Figure 60. MVDD Supply Current (IMVDD) per SPI Input vs. Data Rate at Various Supply Voltages, MSS = Low, Clock Signal Applied on Single SPI Channel, Other Input Channels Tied Low Figure 61. IMVDD per SPI Output vs. Data Rate at Various Supply Voltages, MSS = Low, Clock Signal Applied on Single SPI Channel, Other Input Channels Tied Low Figure 62. Inverting Regulator Load Transient Response, VVINP = 24 V, VOUT1 = 24 V, IOUT1 = 26 mA, VOUT2 = 5 V, IOUT2 = 11 mA, VOUT3 = −15 V, IOUT3 = −0.3 mA to −7 mA Step, TA = 25°C Figure 63. SVDD1 Supply Current (ISVDD1) per SPI Input vs. Data Rate at Various Supply Voltages, SSS = Low, Clock Signal Applied on Single SPI Channel, Other Input Channels Tied Low Figure 64. ISVDD1 vs. Data Rate at Various Supply Voltages, SSS = Low, Clock Signal Applied on Single SPI Channel, Other Input Channels Tied Low |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |