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ADP1034ACPZ-1-R7 数据表(PDF) 5 Page - Analog Devices |
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ADP1034ACPZ-1-R7 数据表(HTML) 5 Page - Analog Devices |
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5 / 41 page ![]() Data Sheet ADP1034 SPECIFICATIONS analog.com Rev. 0 | 5 of 41 Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments Logic Low VIL 0.4 V BUCK REGULATOR Output Voltage VOUT2 5.0 V Output Voltage Accuracy −1.5 +1.5 % IOUT2 = 10 mA Load Regulation (ΔVOUT2/VOUT2)/ ΔIOUT2 −0.0005 %/mA IOUT2 = 2 mA to 50 mA Line Regulation (ΔVOUT2/VOUT2)/ ΔVOUT1 0.0004 %/V VOUT1 = 6 V to 28 V, IOUT2 = 7 mA Power FET On Resistance RON_NFET (BUCK) 1 Ω SW2 current (ISW2) = 100 mA RON_PFET (BUCK) 2.5 Ω ISW2 = 100 mA Current-Limit Threshold ILIM (BUCK) 280 300 320 mA SW2 Leakage Current P Type Metal-Oxide Semiconductor (PMOS) 0.03 0.5 µA VSW2 = 0 V N Type Metal-Oxide Semiconductor (NMOS) 0.03 0.5 µA VSW2 = 28 V Switching Frequency fSW (BUCK) 117.5 125 132.5 kHz SYNC = low or high fSYNC/4 kHz SYNC = external clock Minimum On Time 200 ns Soft Start Timer tSS (BUCK) 8 ms Active Pull-Down Resistor RPD (BUCK) 1.7 kΩ 1.23 V < VOUT1 < 4.5 V INVERTING REGULATOR Output Voltage Range VOUT3 −24 −2 V Feedback Voltage VFB3 0.8 V In reference to VOUT3 Feedback Voltage Accuracy −1.5 +1.5 % Adjustable output option Feedback Bias Current IFB3 0.05 µA Load Regulation (ΔVFB3/VFB3)/ΔIOUT3 −0.01 %/mA IOUT3 = −1 mA to −15 mA Line Regulation (ΔVOUT3/VOUT3)/ ΔVOUT1 0.0005 %/V VOUT1 = 6 V to 28 V, IOUT3 = −15 mA Power FET On Resistance RON_NFET (INVERTER) 1.45 Ω SW3 current (ISW3) = 100 mA RON_PFET (INVERTER) 2.2 Ω ISW3 = 100 mA Current-Limit Threshold ILIM (INVERTER) 280 300 320 mA SW3 Leakage Current PMOS 0.03 0.5 µA VSW3 = −24 V NMOS 0.03 0.5 µA VSW3 = 24 V Switching Frequency fSW (INVERTER) 117.5 125 132.5 kHz SYNC = low or high fSYNC/4 kHz SYNC = external clock Minimum On Time 178 ns Soft Start Timer tSS (INVERTER) 8 ms Active Pull-Down Resistor RPD (INVERTER) 350 Ω 1.23 V < VOUT1 < 4.5 V ISOLATORS DC SPECIFICATIONS2 MCK, MSS, MO, SO, SGPI1, MGPI2, SGPI3 Input Threshold Logic High VIH 0.7 × VxVDD V VxVDD = VMVDD or VSVDDx Logic Low VIL 0.3 × VxVDD V VxVDD = VMVDD or VSVDDx Input Current3 II −1 +1 μA 0 V ≤ VINPUT ≤ VxVDD SCK, SSS, SI, MI Output Voltage |
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