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ADP1034ACPZ-1-R7 数据表(PDF) 34 Page - Analog Devices |
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ADP1034ACPZ-1-R7 数据表(HTML) 34 Page - Analog Devices |
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34 / 41 page ![]() Data Sheet ADP1034 APPLICATIONS INFORMATION analog.com Rev. 0 | 34 of 41 Primary Inductance The ADP1034 operates with a transformer with an inductance in the 80 µH to 560 µH range. However, it is recommended to choose an inductance value that results in the flyback output voltage (VOUT1) divided by the transformer primary inductance being less than or equal to 140,000 to maintain control loop stability. VOUT1/LPRI ≤ 140,000 where: VOUT1 is the flyback regulator output voltage. LPRI is the primary side inductance of the transformer. Using a transformer at the lower end of the inductance range may result in a smaller transformer but also reduces the output power capabilities due to larger ac ripple current through the transformer. Conversely, operating at a higher inductance can result in higher output power at the expense of a potentially larger transformer. Flyback Transformer Saturation Current Do not exceed the saturation current of the transformer in operation or much higher losses and overall lower system efficiency may result. Choose a transformer with a saturation current rating that is greater than the expected peak switch current (ISWP) across line and load conditions. Series Winding Resistance In power loss sensitive applications, keep the series resistance of the primary and secondary windings as low as possible to improve overall efficiency. Leakage Inductance and Clamping Circuits When choosing a transformer to operate with the ADP1034, mini- mize transformer leakage inductance. Leakage inductance causes a voltage spike to appear on the SWP node when the flyback regulator switch is off due to energy storage in the leakage induc- tance that is not transferred to the output. The voltage spike is more prominent at higher load currents and increases with higher leakage inductance. It is important to keep the voltage spikes lower than the voltage rating of the flyback switch that drives the SWP pin. Margin must be built into any design to avoid exceeding this limit if no clamp or snubber circuit is used to protect the flyback switch. To estimate the leading voltage spike at the SWP pin when the switch turns off, use the following equation: VPEAK = IPEAK × (LLEAK/(CP + CSWP))1/2 + VVINP + VOUT1 + VD where: VPEAK is the voltage spike amplitude. IPEAK is the peak current on the flyback switch. LLEAK is the leakage inductance of the transformer. CP is the parasitic capacitance of the transformer. CSWP is the capacitance on the flyback switch. VVINP is the input supply voltage. VOUT1 is the output voltage of the flyback regulator. VD is the forward voltage drop across the rectifier diode. A snubber or clamp circuit can protect the flyback switch for cases where the leakage inductance is too high for application conditions. Two common types of a clamping circuit are the resistor, capaci- tor, diode clamp shown in Figure 86 and the diode, Zener diode clamp shown in Figure 87. The resistor, capacitor, diode clamp quickly dampens the voltage spike and provides improved EMI performance, and the diode, Zener diode clamp can be used when the clamping level must be consistent and well defined. The diode, Zener diode clamp has slightly higher power efficiency over the resistor, capacitor, diode clamp. However, the cost of the diode, Zener diode clamp solution is typically higher than the resistor, capacitor, diode clamp solution. Figure 86. Resistor, Capacitor, Diode Clamp Figure 87. Diode, Zener Diode Clamp Clamping Resistor To calculate the clamping resistor (RCLAMP) value, the clamping voltage (VCLAMP) must be determined. The clamping voltage is the voltage on which any voltage spike that occurs on the flyback switch is clamped. Choose a VCLAMP that is lower than the SWP maximum voltage rating (SWPVMAX) specified in the Absolute Max- imum Ratings section and is greater than the summation of the maximum input supply (VVINP_MAX) and the maximum flyback output voltage (VOUT1_MAX) of the application as given by SWPVMAX > VVINP_MAX + VCLAMP > VVINP_MAX + VOUT1_MAX |
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