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STM32F405 数据表(PDF) 121 Page - STMicroelectronics |
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STM32F405 数据表(HTML) 121 Page - STMicroelectronics |
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121 / 204 page  DS8626 Rev 9 121/203 STM32F405xx, STM32F407xx Electrical characteristics 5.3.19 Communications interfaces I2C interface characteristics The I2C interface meets the timings requirements of the I2C-bus specification and user manual rev. 03 for: • Standard-mode (Sm): with a bit rate up to 100 kbit/s • Fast-mode (Fm): with a bit rate up to 400 kbit/s. The I2C timings requirements are guaranteed by design when the I2C peripheral is properly configured (refer to RM0090 reference manual). The SDA and SCL I/O requirements are met with the following restrictions: the SDA and SCL I/O pins are not “true” open-drain. When configured as open-drain, the PMOS connected between the I/O pin and VDD is disabled, but is still present. Refer to Section 5.3.16: I/O port characteristics for more details on the I2C I/O characteristics. All I2C SDA and SCL I/Os embed an analog filter. Refer to the table below for the analog filter characteristics: Table 53. Characteristics of TIMx connected to the APB2 domain(1) 1. TIMx is used as a general term to refer to the TIM1, TIM8, TIM9, TIM10, and TIM11 timers. Symbol Parameter Conditions Min Max Unit tres(TIM) Timer resolution time AHB/APB2 prescaler distinct from 1, fTIMxCLK = 168 MHz 1- tTIMxCLK 5.95 - ns AHB/APB2 prescaler = 1, fTIMxCLK = 84 MHz 1- tTIMxCLK 11.9 - ns fEXT Timer external clock frequency on CH1 to CH4 fTIMxCLK = 168 MHz APB2 = 84 MHz 0fTIMxCLK/2 MHz 084 MHz ResTIM Timer resolution - 16 bit tCOUNTER 16-bit counter clock period when internal clock is selected 1 65536 tTIMxCLK tMAX_COUNT Maximum possible count - 32768 tTIMxCLK Table 54. I2C analog filter characteristics(1) 1. Guaranteed by design. Symbol Parameter Min Max Unit tAF Maximum pulse width of spikes that are suppressed by the analog filter 50(2) 2. Spikes with widths below tAF(min) are filtered. 260(3) 3. Spikes with widths above tAF(max) are not filtered ns |
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