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STM32F405 数据表(PDF) 201 Page - STMicroelectronics

部件名 STM32F405
功能描述  Arm® Cortex®-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
PDF  204 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F405 数据表(HTML) 201 Page - STMicroelectronics

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DS8626 Rev 9
201/203
STM32F405xx, STM32F407xx
Revision history
22-Oct-2015
6
In the whole document, updated notes related to values guaranteed by
design or by characterization.
Updated Table 34: HSI oscillator characteristics.
Changed fVCO_OUT minimum value and VCO freq to 100 MHz in
Table 36: Main PLL characteristics and Table 37: PLLI2S (audio PLL)
characteristics.
Updated Figure 39: SPI timing diagram - slave mode and CPHA = 0.
Updated Figure 53: 12-bit buffered /non-buffered DAC.
Removed note 1 related to better performance using a restricted VDD
range in Table 68: ADC accuracy at fADC = 30 MHz.
Upated Figure 84: LQFP144 - 144-pin, 20 x 20 mm low-profile quad flat
package outline.
Updated Figure 87: UFBGA176+25 ball, 10 x 10 mm, 0.65 mm pitch,
ultra fine pitch ball grid array package outline and Table 95:
UFBGA176+25 ball, 10 × 10 × 0.65 mm pitch, ultra thin fine pitch ball
grid array mechanical data.
16-Mar-2016
7
Updated Figure 2: Compatible board design
STM32F10xx/STM32F2/STM32F40xxx for LQFP100 package.
Updated |VSSX
− VSS| in Table 11: Voltage characteristics to add VREF−.
Added VREF− in Table 67: ADC characteristics.
Updated Table 90: WLCSP90 - 4.223 x 3.969 mm, 0.400 mm pitch
wafer level chip scale package mechanical data.
Table 99. Document revision history (continued)
Date
Revision
Changes



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