L99LD21 datasheet(44/73 Pages) STMICROELECTRONICS

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SPI functional description

L99LD21

44/73

DS11130 Rev 5

SR#3: Status Register 3

Address:

0x07h

Type:

R/C

9876

543210

VLED1,OFF

VLED2,OFF

Unused

R/C

Table 24. SR#3: Status Register 3

Bit

Default

Name

Description

Access

23÷16

00000000

VLED1,OFF

ADC conversion related to VLED1 (rangin g from 0 V to

52.5 V), sampled during off-time of Buck1.

Note that in case of Buck1 controlled by DIN pin or by SPI, the

ADC is continuously refreshed during off-state, while, if

controlled by internal PWM dimming generator, ADC refresh

occurs only once per period just before the end of each PWM

off-cycle.

R/C

15÷8

00000000

VLED2,OFF

ADC conversion related to VLED2 (ranging from 0 V to 52.5 V),

sampled during off-time of Buck2.

Note that in case of Buck1 controlled by DIN pin or by SPI, the

ADC is continuously refreshed during off-state, while, if

controlled by internal PWM dimming generator, ADC refresh

occurs only once per period just before the end of each PWM

off-cycle.

R/C

7÷1

0000000

Unused

Parity Bit

ODD Parity Bit Check

Table 25. Watchdog status

WD_STATUS

WD timer status

[0…24%]

[24% … 50%]

[50% … 74%]

[74% … 100%]

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