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L99LD21 数据表(PDF) 62 Page - STMicroelectronics |
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L99LD21 数据表(HTML) 62 Page - STMicroelectronics |
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62 / 73 page  Electrical specifications L99LD21 62/73 DS11130 Rev 5 6.4.4 SPI Note: See also Chapter 5: SPI functional description. Table 42. SPI signal description Symbol Parameter Test conditions Min Typ Max Unit CSN Chip Select Not High State 0.7 * V3V3 — V3V3 V Low State — — 0.3 * V3V3 SCK Serial Clock High State 0.7 * V3V3 — V3V3 V Low State — — 0.3 * V3V3 SDI Serial data Input High State 0.7 * V3V3 — V3V3 V Low State — — 0.3 * V3V3 SDO Serial data Output - High State IOUT = -1 mA VSPI-0.5 VSPI-0.2 — V Serial data Output - Low State IOUT = 1 mA — 0.2 0.5 ILK Output leakage current — -1 — 1 µA Table 43. SPI timings Symbol Parameter Test conditions Min Typ Max Unit Tsck Serial clock (SCK) period 250 ns THsck SCK high time 100 ns TLsck SCK low time 100 ns Trise_in CSN, SCK, SDI rise time Fsck = 4 MHz 25 ns Tfall_in CSN, SCK, SDI fall time Fsck = 4 MHz 25 ns THcsn CSN high time 6 µs TScsn CSN setup time, CSN low before SCK rising 100 ns TSsck SCK setup time, SCK low before CSN rising 100 ns TSsdi SDI setup time before SCK rising 25 ns Thold_sdi SDI hold time 25 ns Tcsn_v CSN falling until SDO valid Cout = 50 pF; Iout = ±1 mA 100 ns Tcsn_v CSN rising until SDO tristate Cout = 50 pF; Iout = ±4 mA 100 ns Tsck_v SCK falling until SDO valid Cout = 50 pF 60 ns TRsdo SDO rise time Cout = 50 pF; Iout = -1 mA 50 100 ns |
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