KSZ9567RTXI-TR datasheet(148/232 Pages) MICROCHIP

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KSZ9567R

DS00002329D-page 148

 2017-2019 Microchip Technology Inc.

5.2.2.12

PHY MMD Setup Register

PHY register 0x0D.

5.2.2.13

PHY MMD Data Register

PHY register 0x0E.

Address:

0xN11A - 0xN11B

Port N: 1-5

Size:

16 bits

Bits

Description

Type

Default

15:14

MMD Operation Mode

For the selected MMD device address (bits [4:0] of this register), these two

bits select one of the following register or data operations and the usage for

the PHY MMD Data Register.

00 = Register

01 = Data, no post increment

10 = Data, post increment on reads and writes

11 = Data, post increment on writes only

R/W

00b

13:5

RESERVED

R/W

0x000

4:0

MMD Device Address

R/W

0x00

Address:

0xN11C - 0xN11D

Port N: 1-5

Size:

16 bits

Bits

Description

Type

Default

15:0

MMD R/W Index/Data

For the selected MMD device address (in the PHY MMD Setup Register, bits

[4:0]):

When the PHY MMD Setup Register bits [15:14] = 00, this register contains

the read/write register access for the MDD device address.

Otherwise, this register contains the read/write data value for the MMD

device address and its selected register address

Refer to the PHY MMD Setup Register bits [15:14] for descriptions of post

increment reads and writes of this register for data operation.

R/W

0x0000

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