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KSZ9567RTXI-TR 数据表(PDF) 149 Page - Microchip Technology |
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KSZ9567RTXI-TR 数据表(HTML) 149 Page - Microchip Technology |
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149 / 232 page ![]() 2017-2019 Microchip Technology Inc. DS00002329D-page 149 KSZ9567R 5.2.2.14 PHY Extended Status Register PHY register 0x0F. 5.2.2.15 PHY Remote Loopback Register PHY register 0x11. Address: 0xN11E - 0xN11F Port N: 1-5 Size: 16 bits Bits Description Type Default 15 1000BASE-X Full-Duplex 1 = PHY able to perform 1000BASE-T full duplex 0 = PHY cannot perform 1000BASE-T full-duplex RO 0b 14 1000BASE-X Half-Duplex 1 = PHY able to perform 1000BASE-T half duplex 0 = PHY cannot perform 1000BASE-T half-duplex RO 0b 13 1000BASE-T Full-Duplex 1 = PHY able to perform 1000BASE-T full duplex 0 = PHY cannot perform 1000BASE-T full-duplex RO 1b 12 1000BASE-T Half-Duplex 1 = PHY able to perform 1000BASE-T half duplex 0 = PHY cannot perform 1000BASE-T half-duplex RO 1b 11:0 RESERVED RO – Address: 0xN122 - 0xN123 Port N: 1-5 Size: 16 bits Bits Description Type Default 15:9 RESERVED R/W 0x00 8 Remote Loopback Data received at the external pins of a port is looped back and sent out the same port, without passing through the internal switch fabric. For PHY ports, data is received on the RX+/- pins and transmitted out the TX+/- pins. 1 = Remote loopback 0 = Normal operation R/W 0b 7:2 RESERVED R/W 1111_01b 1 RESERVED R/W RC 0b 0 RESERVED RO 0b |
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