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KSZ9567RTXI-TR 数据表(PDF) 169 Page - Microchip Technology |
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KSZ9567RTXI-TR 数据表(HTML) 169 Page - Microchip Technology |
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169 / 232 page  2017-2019 Microchip Technology Inc. DS00002329D-page 169 KSZ9567R 5.2.7 PORT N: PORT SWITCH INGRESS CONTROL REGISTERS (0xN800 - 0xN8FF) 5.2.7.1 Port Mirroring Control Register This register contains the port controls for port mirroring. The Global Port Mirroring and Snooping Control Register must also be properly configured. 5.2.7.2 Port Priority Control Register To achieve the desired functionality, do not set more than one bit at a time in this register. Address: 0xN800 Port N: 1-7 Size: 8 bits Bits Description Type Default 7 RESERVED RO 0b 6 Receive Sniff 1 = All packets received on this port are designated as “monitored packets” and will be forwarded to the designated “sniffer port”. 0 = No receive monitoring. R/W 0b 5 Transmit Sniff 1 = All packets transmitted on this port are designated as “monitored packets” and will be forwarded to the designated “sniffer port”. 0 = No transmit monitoring. R/W 0b 4:2 RESERVED RO 0_00b 1 Sniffer Port 1 = This port is designated as the sniffer port and will transmit monitored packets. 0 = Not a sniffer port. Normal operation. R/W 0b 0 RESERVED RO 0b Address: 0xN801 Port N: 1-7 Size: 8 bits Bits Description Type Default 7 Highest Priority 1 = Highest priority selected 0 = Highest priority not selected R/W 0b 6 OR’ed Priority 1 = All available priority OR’ed 0 = All available priority not OR’ed R/W 0b 5 RESERVED RO 0b 4 MAC Address Priority Classification 1 = Enable MAC address priority classification for ingress packets on port 0 = Disable MAC address classification R/W 0b |
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