M58WR032EB datasheet(60/81 Pages) STMICROELECTRONICS

60 / 81 page

M58WR032ET, M58WR032EB

60/81

Table 35. Protection Register Information

Table 36. Burst Read Information

Table 37. Bank and Erase Block Region Information

Note: 1. The variable P is a pointer which is defined at CFI offset 15h.

2. Bank Regions. There are two Bank Regions, 1 contains all the banks that are made up of main blocks only, 2 contains the banks

that are made up of the parameter and main blocks.

Offset

Data

Description

Value

(P+E)h = 47h

0001h

Number of protection register fields in JEDEC ID space. 0000h indicates that

256 fields are available.

(P+F)h = 48h

0080h

Protection Field 1: Protection Description

Bits 0-7 Lower byte of protection register address

Bits 8-15 Upper byte of protection register address

Bits 16-23 2n bytes in factory pre-programmed region

Bits 24-31 2n bytes in user programmable region

0080h

(P+10)h = 49h

0000h

(P+11)h =

4Ah

0003h

8 Bytes

(P+12)h= 4Bh

0004h

16 Bytes

Offset

Data

Description

Value

(P+13)h = 4Ch

0003h

Page-mode read capability

bits 0-7’n’ such that 2n HEX value represents the number of read-page

bytes. See offset 28h for device word width to determine

page-mode data output width.

8 Bytes

(P+14)h = 4Dh

0003h

Number of synchronous mode read configuration fields that follow.

(P+15)h = 4Eh

0001h

Synchronous mode read capability configuration 1

bit 3-7Reserved

bit 0-2’n’ such that 2n+1 HEX value represents the maximum number of

continuous synchronous reads when the device is configured

for its maximum word width. A value of 07h indicates that the

device is capable of continuous linear bursts that will output

data until the internal burst counter reaches the end of the

device’s burstable address space. This field’s 3-bit value can

be written directly to the read configuration register bit 0-2 if

the device is configured for its maximum word width. See

offset 28h for word width to determine the burst data output

width.

(P+16)h = 4Fh

0002h

Synchronous mode read capability configuration 2

(P+17)h = 50h

0007h

Synchronous mode read capability configuration 3

Cont.

M58WR032ET (top)

M58WR032EB (bottom)

Description

Offset

Data

Offset

Data

(P+18)h =51h

02h

(P+18)h =51h

02h

Number of Bank Regions within the device

M58WR032EB 数据表(PDF) 60 Page - STMicroelectronics

M58WR032EB 数据表(HTML) 60 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

数据表下载

链接网址

M58WR032EB 数据表(PDF) 60 Page - STMicroelectronics

M58WR032EB 数据表(HTML) 60 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

数据表 下载

链接网址

数据表下载