M58WR032EB datasheet(24/81 Pages) STMICROELECTRONICS

24 / 81 page

M58WR032ET, M58WR032EB

24/81

or Erase operation. Indeterminate results can oc-

cur if VPP becomes invalid during an operation.

When the VPP Status bit is Low (set to ‘0’), the volt-

age on the VPP pin was sampled at a valid voltage;

when the VPP Status bit is High (set to ‘1’), the VPP

pin has a voltage that is below the VPP Lockout

Voltage, VPPLK, the memory is protected and Pro-

gram and Erase operations cannot be performed.

Once set High, the VPP Status bit can only be reset

Low by a Clear Status Register command or a

hardware reset. If set High it should be reset be-

fore a new Program or Erase command is issued,

otherwise the new command will appear to fail.

Program Suspend Status Bit (SR2). The

Pro-

gram Suspend Status bit indicates that a Program

operation has been suspended in the addressed

block. When the Program Suspend Status bit is

High (set to ‘1’), a Program/Erase Suspend com-

mand has been issued and the memory is waiting

for a Program/Erase Resume command. The Pro-

gram Suspend Status should only be considered

valid when the Program/Erase Controller Status

bit is High (Program/Erase Controller inactive).

SR2 is set within the Program Suspend Latency

time of the Program/Erase Suspend command be-

ing issued therefore the memory may still com-

plete the operation rather than entering the

Suspend mode.

When a Program/Erase Resume command is is-

sued the Program Suspend Status bit returns Low.

Block Protection Status Bit (SR1). The

Block

Protection Status bit can be used to identify if a

Program or Block Erase operation has tried to

modify the contents of a locked block.

When the Block Protection Status bit is High (set

to ‘1’), a Program or Erase operation has been at-

tempted on a locked block.

Once set High, the Block Protection Status bit can

only be reset Low by a Clear Status Register com-

mand or a hardware reset. If set High it should be

reset before a new command is issued, otherwise

the new command will appear to fail.

Bank Write/Multiple Word Program Status Bit

(SR0). The Bank Write Status bit indicates wheth-

er the addressed bank is programming or erasing.

In Enhanced Factory Program mode the Multiple

Word Program bit shows if a Word has finished

programming or verifying depending on the phase.

The Bank Write Status bit should only be consid-

ered valid when the Program/Erase Controller Sta-

tus SR7 is Low (set to ‘0’).

When both the Program/Erase Controller Status bit

and the Bank Write Status bit are Low (set to ‘0’),

the addressed bank is executing a Program or

Erase operation. When the Program/Erase Con-

troller Status bit is Low (set to ‘0’) and the Bank

Write Status bit is High (set to ‘1’), a Program or

Erase operation is being executed in a bank other

than the one being addressed.

In Enhanced Factory Program mode if Multiple

Word Program Status bit is Low (set to ‘0’), the de-

vice is ready for the next Word, if the Multiple Word

Program Status bit is High (set to ‘1’) the device is

not ready for the next Word.

Note: Refer to APPENDIX C., FLOWCHARTS

AND PSEUDO CODES, for using the Status Reg-

ister.

M58WR032EB 数据表(PDF) 24 Page - STMicroelectronics

M58WR032EB 数据表(HTML) 24 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

数据表下载