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M58WR032EB 数据表(PDF) 80 Page - STMicroelectronics |
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M58WR032EB 数据表(HTML) 80 Page - STMicroelectronics |
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80 / 81 page ![]() M58WR032ET, M58WR032EB 80/81 REVISION HISTORY Table 44. Document Revision History Date Version Revision Details 07-Aug-2002 1.0 First Issue 12-Dec-2002 1.1 Clear Status Register Command, Program/Erase Suspend Command, Set Configuration Register Command and Factory Program Commands clarified; Tables 5, 7 and 9 modified; Erase Status Bit (SR5) and Wait Configuration Bit (CR8), clarified; Asynchronous Read Mode, Synchronous Burst Read Mode and Single Synchronous Read Mode, clarified; WAIT Active Low bar removed from Figures 10, 11. Note 4 added to Figure 12 and modified in Figure 13. Package mechanical information corrected and Daisy Chain added (Figures 19 and 20). Data at address offsets 35h, 38h is reserved. 07-Feb-2003 1.2 85ns Speed Class removed, 80ns Speed Class added. 70ns Speed Class characterized (certain timings modified). Block numbering corrected in Table 28., Top Boot Block Addresses, M58WR032ET. Address lines corrected in AC Waveforms. 2nd Bus Write Operation Address modified for Enhanced Factory Program, Setup Program, in Table 7., Factory Program Commands. Clear Status Register Command and Program Command clarified. Data corrected at (P + 37)h = 70h offset in Table 39., Bank and Erase Block Region 2 Information. Datasheet promoted from Target Specification to Product Preview. 20-May-2003 1.3 Automatic Standby mode explained under Asynchronous Read Mode. Minor text changes in Clear Status Register Command, Quadruple Enhanced Factory Program Command and Synchronous Burst Read Mode. Bank Erase Command moved from the Standard to the Factory Program Commands. Number of Bank Erase cycles limited to 100. Erase replaced by Block Erase in Tables 11 and 12, Dual Operations Allowed in Other Banks and the Same Bank, respectively. IPP2 parameter for VPP = VPPH removed from Table 18., DC Characteristics - Currents. VDDQ range split into two in Tables 20 and 21, Asynchronous and Synchronous Read AC Characteristics: for VDDQ = 2.2V to 3.3V, tAVQV1, tELTV, tEHTZ, tEHQZ, tGLQV, tAVLH, tELLH and tLLLH in Table 20 and all the timings in Table 21. were modified. 13-Apr-2004 2.0 Document promoted from Product Preview to Full Datasheet status. Small text changes. |
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