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STM32U535NET3QTR 数据表(PDF) 196 Page - STMicroelectronics

部件名 STM32U535NET3QTR
功能描述  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, up to 512 KB flash memory, 274 KB SRAM
PDF  278 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32U535NET3QTR 数据表(HTML) 196 Page - STMicroelectronics

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Electrical characteristics
STM32U535xx
196/278
DS14217 Rev 1
5.3.10
Flash memory characteristics
IDD(PLL)
PLL power
consumption on
VDD
with LDO
VCO freq = 160 MHz,
1 clock output
Range 1
-
370
-
μA
VCO freq = 160 MHz,
3 clock outputs
Range 1
-
390
-
VCO freq = 200 MHz,
1 clock output
Range 1
-
460
-
Range 2
-
435
-
Range 3
-
410
-
VCO freq = 336 MHz,
1 clock output
Range 1
-
710
-
VCO freq = 544 MHz,
1 clock output
Range 1
-
1100
-
IDD(PLL)
PLL power
consumption on
VDD
with SMPS
VCO freq = 160 MHz,
1 clock output
Range 1, IVCORE(6) = 19.4 mA
-
260
-
VCO freq = 160 MHz,
3 clock outputs
Range 1, IVCORE(6) = 19.4 mA
-
270
-
VCO freq = 200 MHz,
1 clock output
Range 1, IVCORE(6) = 19.4 mA
-
320
-
Range 2, IVCORE(6) = 11.7 mA
-
300
-
Range 3, IVCORE(6) = 5.74 mA
-
290
-
VCO freq = 336 MHz,
1 clock output
Range 1, IVCORE(6) = 19.4 mA
-
470
-
VCO freq = 544 MHz,
1 clock output
Range 1, IVCORE(6) = 19.4 mA
-
730
-
1. Specified by design and not tested in production, unless otherwise specified.
2. PLL1 output Q and PLL2 output Q can be up to 200 MHz only when selected as OCTOSPI clock.
3. Evaluated by characterization. Not tested in production.
4. Lock time is the duration until PLLxRDY flag (2% of final frequency).
5. Measured on 5000 cycles.
6. SMPS efficiency based on CoreMark RUN current on VCORE at max frequency of each voltage range.
Table 84. PLL characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Table 85. Flash memory characteristics(1)
Symbol
Parameter
Conditions
Typ
Max(2)
Unit
tprog
128-bit programming time
Normal mode
118
118
µs
Burst mode
48
48



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