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MPZ2012S221A 数据表(PDF) 9 Page - STMicroelectronics |
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MPZ2012S221A 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 56 page ![]() 5 Functional description The iso-buck topology based on the L6983I consists of: • Primary side, the regulation loop of the peak current mode architecture regulates the primary voltage (blue area in the image below) • A two-windings transformer (in gray) • The secondary side, which generates the isolated output voltage (in green) given the selected transformer ratio. Figure 4. Iso-buck general schematic VIN VIN VINLDO EN/CLKIN FSW VCC AGND AGND PGOOD BOOT SW SW VBIAS FB PGND PGND EP VIN GND GND VOUT_prim VOUT_iso GND_iso L6983I CIN CLDO RLDO RFSW1 CVCC CB RFB1 RFB2 D CSEC COUT 5.1 Primary side The L6983I device is based on a “peak current mode” architecture with constant frequency control. Therefore, the intersection between the error amplifier output and the sensed inductor current generates the PWM control signal to drive the power switch. The device operates in forced PWM control, allowing negative currents to flow in the synchronous MOSFET, hence transferring energy to the secondary coil during the off-time. The main internal blocks shown in Figure 5 : • Embedded power elements • A fully integrated adjustable oscillator, which is able to set five different switching frequencies from 200 kHz to 1 MHz • The ramp for the slope compensation avoiding subharmonic instability • A transconductance error amplifier with integrated compensation network • The high-side current sense amplifier to sense the inductor current • A “Pulse Width Modulator” (PWM) comparator and the driving circuitry of the embedded power elements • The soft-start block ramps up the reference voltage on error amplifier thus decreasing the inrush current at power-up. The EN pin inhibits the device when driven low • The EN/CLK pin section, which allows synchronizing the device to an external clock generator • The pulse-by-pulse high-side / low-side switch current sensing to implement the constant current protection • A circuit to implement the thermal protection function • The OVP circuitry to discharge the output capacitor in case of overvoltage event • The switchover capability of the internal regulator to supply a portion of the quiescent current when the VBIAS pin is connected to an external output voltage • Enable / disable dithering operation. L6983I Functional description DS14040 - Rev 1 page 9/56 |
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