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MPZ2012S221A 数据表(PDF) 35 Page - STMicroelectronics |
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MPZ2012S221A 数据表(HTML) 35 Page - STMicroelectronics |
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35 / 56 page ![]() Figure 42. External synchronization (AC coupling) VIN VIN EN/CLKIN AGND AGND EP VIN GND L6983I FSW RFSW1 VPP REN1 REN2 CEN The AC-coupling allows the device to keep the power-up and down thresholds defined by the partition connected to the EN/CLKIN pin and described in Section 9.3 Programmable power-up threshold. The following table shows the minimum pulse duration for the external signal and maximum duty cycle that allows the synchronization by keeping the selected power-up and down thresholds. Table 8. External synchronization AC coupling suggested operation range VPP [V] TON,MIN, EXT Clock [ns] DMAX, EXTClock [%] 2.3 60 45 3.3 20 30 5 20 20 The minimum amplitude for the external clock signal is, for both the configurations, equal to 2.3 V. The network given by CEN and RENL sets a high-pass filter. Considering a resistor in the order of 220 KΩ, a capacitor equal to 1 nF is a correct choice. L6983I Output External synchronization DS14040 - Rev 1 page 35/56 |
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