MPZ2012S221A datasheet(17/56 Pages) STMICROELECTRONICS

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Iso-buck performances

All results shown in this section come from measurements performed using the reference schematic depicted in

Figure 16.

Figure 16. Reference schematic for measurements of line and load regulation and efficiency

VIN

VINLDO

EN/CLKIN

FSW

VCC

AGND

PGOOD

BOOT

VBIAS

PGND

VIN

GND

VOUT_prim

VOUT_iso

GND_iso

L6983I

CIN

CLDO

RLDO

RFSW1

CVCC

RFB1

RFB2

CSEC

COUT

10μF

1μF

0Ω

1μF

0Ω

100nF

3x22μF

10μF

360kΩ

75kΩ

6.1

Output voltage line regulation

Primary output line regulation

The regulator features an enhanced primary line regulation due to the peak current mode architecture. Figure 17

shows the negligible output voltage variation (normalized to the value measured at VIN = 12 V) over an input

voltage range up to 32 V for L6983I with VOUT_prim = 5 V, at three different output currents (N = 6).

Figure 17. Primary output line regulation (VOUT_prim = 5 V, fSW = 400 kHz)

-0.20%

-0.15%

-0.10%

-0.05%

0.00%

0.05%

0.10%

0.15%

0.20%

Primary input voltage [V]

Iout_prim = 1 A

Iout_prim = 2 A

Iout_prim = 3 A

Secondary output line regulation

The secondary output line regulation is defined, similarly to the primary side, as the variation of secondary the

output voltage due to the input voltage change at a specific current. The secondary output line regulation is mainly

affected by the transformer and in particular by its leakage inductance.

Keeping constant the leakage inductance (that is, using the same transformer), a higher input voltage causes the

isolated output voltage to slightly increase, as shown in Figure 18.

L6983I

Iso-buck performances

DS14040 - Rev 1

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