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DSP56321RM/D 数据表(PDF) 21 Page - NXP Semiconductors

部件名 DSP56321RM/D
功能描述  24-Bit Digital Signal Processor
PDF  88 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

DSP56321RM/D 数据表(HTML) 21 Page - NXP Semiconductors

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1-15
Serial Communication Interface (SCI)
1.10 Serial Communication Interface (SCI)
The SCI provides a full duplex port for serial communication with other DSPs, microprocessors, or
peripherals such as modems.
Table 1-13. Serial Communication Interface
Signal Name
Type
State During
Reset1,2
Signal Description
RXD
PE0
Input
Input or Output
Ignored Input
Serial Receive Data—Receives byte-oriented serial data and
transfers it to the SCI Receive Shift Register.
Port E 0—The default configuration following reset is GPIO input
PE0. When configured as PE0, signal direction is controlled
through the Port E Direction Register. The signal can be
configured as an SCI signal RXD through the Port E Control
Register.
TXD
PE1
Output
Input or Output
Ignored Input
Serial Transmit Data—Transmits data from the SCI Transmit
Data Register.
Port E 1—The default configuration following reset is GPIO input
PE1. When configured as PE1, signal direction is controlled
through the Port E Direction Register. The signal can be
configured as an SCI signal TXD through the Port E Control
Register.
SCLK
PE2
Input/Output
Input or Output
Ignored Input
Serial Clock—Provides the input or output clock used by the
transmitter and/or the receiver.
Port E 2—The default configuration following reset is GPIO input
PE2. When configured as PE2, signal direction is controlled
through the Port E Direction Register. The signal can be
configured as an SCI signal SCLK through the Port E Control
Register.
Notes:
1.
In the Stop state, the signal maintains the last state as follows:
• If the last state is input, the signal is an ignored input.
• If the last state is output, these lines maintain the last output state even if the drivers are tri-stated,
because they have internal weak keeper circuits.
2.
The Wait processing state does not affect the signal state.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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