DSP56321RMSLASHD datasheet(1/88 Pages) NXP

部件名	DSP56321RM/D

功能描述	24-Bit Digital Signal Processor

PDF	88 Pages

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制造商	NXP [NXP Semiconductors]

网页	http://www.nxp.com

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Technical Data

Advance Information

DSP56321T/D

Rev. 2, 10/2002

24-Bit Digital Signal

Processor

Figure 1. DSP56321T Block Diagram

YAB

XAB

PAB

YDB

XDB

PDB

GDB

MODB/IRQB

MODC/IRQC

13

MODD/IRQD

DSP56300

6

16

24-Bit

24

18

DDB

DAB

Peripheral

Core

Expansion Area

6

5

3

RESET

MODA/IRQA

PINIT/NMI

EXTAL

XTAL

Address

Control

Data

Address

Generation

Unit

Six Channel

DMA Unit

Program

Interrupt

Controller

Program

Decode

Controller

Program

Address

Generator

Data ALU

24

× 24 + 56 → 56-bit MAC

Two 56-bit Accumulators

56-bit Barrel Shifter

Power

Management

External

Bus

Interface

and

I - Cache

Control

Memory Expansion Area

DE

Program

RAM

32 K

× 24 bits

X Data

RAM

80 K

× 24 bits

Y Data

RAM

80 K

× 24 bits

External

Address

Bus

Switch

SCI

EFCOP

ESSI

HI08

Triple

Timer

or

31 K

× 24 bits

Instruction

Cache

1024

× 24 bits

Bootstrap

ROM

PCAP

and

OnCE™

JTAG

PLL

Clock

Generator

Internal

Data

Bus

Switch

External

Data

Bus

Switch

The DSP56321T is a

member of the

DSP56300 Digital

Signal Processor (DSP)

family intended for

applications requiring a

large amount of

on-device memory. The

on-board EFCOP can

accelerate general

filtering applications,

such as

echo-cancellation,

correlation, and

general-purpose

convolution-based

algorithms. By operating

in parallel with the core,

the EFCOP provides

overall enhanced

performance and signal

quality with no impact

on channel throughput

or total channel support.

The Motorola DSP56321T supports networking,

security encryption, and home entertainment

applications using a high- performance,

single-clock-cycle-per- instruction engine

(DSP56000 code-compatible), a barrel shifter,

24-bit addressing, an instruction cache, and a

six-channel direct memory access (DMA)

controller (see Figure 1).

The DSP5321T offers 220/240 MMACS

performance, attaining 440/480 MMACS when the

EFCOP is in use, It operates with an internal

220/240 MHz clock, using a 1.6 volt core and

independent 3.3 volt input/output (I/O) power.

This device is pin- compatible with the Motorola

DSP56303, DSP56L307, DSP56309, and

DSP56311.

Note: This document contains information on a new product. Specifications and information herein are subject to change without notice.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

类似零件编号 - DSP56321RM/D

制造商	部件名	数据表	功能描述
NXP Semiconductors	DSP56321RM	1Mb / 84P	24-Bit Digital Signal Processor Rev. 11, 2/2005

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类似说明 - DSP56321RM/D

制造商	部件名	数据表	功能描述
Motorola, Inc	DSP56309UM	4Mb / 424P	24-Bit Digital Signal Processor
	DSP56L307	1Mb / 108P	24-Bit Digital Signal Processor
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Freescale Semiconductor...	DSP56321	1Mb / 84P	24-Bit Digital Signal Processor
	DSP56301	2Mb / 124P	24-Bit Digital Signal Processor
	DSP56L307	1Mb / 104P	24-Bit Digital Signal Processor
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	DSP56311VL150R2	1Mb / 96P	24-Bit Digital Signal Processor
NXP Semiconductors	DSP56305	2Mb / 120P	24-Bit Digital Signal Processor Rev. 4, 11/2002
NXP Semiconductors	DSP56001A	1Mb / 101P	24-BIT DIGITAL SIGNAL PROCESSOR Rev. 1