 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ADE7169ASTF16 数据表(PDF) 40 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADE7169ASTF16 数据表(HTML) 40 Page - Analog Devices |
|
|
40 / 140 page  ADE7169F16 Preliminary Technical Data Rev. PrD | Page 40 of 140 Location Mnemonic Value 7 – 6 Reserved 0 These bits should be kept cleared for proper operation 5 - 4 SEL_I_CH[1:0] 0 These bits define the current channel used for energy measurements [1:0] 00 Current channel automatically selected by the tampering condition 01 Current channel connected to IA 10 Current channel connected to IB 11 Current channel automatically selected by the tampering condition 3 V_CH_SHORT 0 Logic one short voltage channel to ground 2 I_CH_SHORT 0 Logic one short Current channels to ground 1 - 0 Reserved Table 35. Interrupt Status Register 1 SFR (MIRQSTL, 0xDC) Bit Location Interrupt Flag Description 7 ADEIRQFLAG This bit is set if any of the ADE status flags that are enabled to generate an ADE interrupt are set. This bit is automatically cleared when all of the enabled ADE status flags are cleared. 6 Reserved Reserved. 5 FAULTSIGN Logic one indicates that the Fault mode has changed according to the configuration of the ACCMODE register 4 VARSIGN Logic one indicates that the reactive power sign changed according to the configuration of ACCMODE register 3 APSIGN Logic one indicates that the active power sign changed according to the configuration of ACCMODE register 2 VANOLOAD Logic one indicates that an interrupt was caused by apparent power no-load detected. This interrupt is also used to reflect the part entering the IRMS No load mode. 1 RNOLOAD Logic one indicates that an interrupt was caused by reactive power no-load detected. 0 APNOLOAD Logic one indicates that an interrupt was caused by active power no-load detected. Table 36. Interrupt Status Register 2 SFR (MIRQSTM, 0xDD) Bit Location Interrupt Flag Description 7 CF2 Logic one indicates that a pulse on CF2 has been issued. The flag is set even if CF2 pulse output is not enabled by clearing bit 2 of MODE1 register. 6 CF1 Logic one indicates that a pulse on CF1 has been issued. The flag is set even if CF1 pulse output is not enabled by clearing bit 1 of MODE1 register. 5 VAEOF Logic one indicates that the VAHR register has overflowded 4 REOF Logic one indicates that the VARHR register has overflowded 3 AEOF Logic one indicates that the WATTHR register has overflowded 2 VAEHF Logic one indicates that the VAHR register is half full 1 REHF Logic one indicates that the VARHR register is half full 0 AEHF Logic one indicates that the WATTHR register is half full Table 37. Interrupt Status Register 3 SFR (MIRQSTH, 0xDE) Bit Location Interrupt Flag Description 7 RESET Indicates the end of a reset (for both sofware or hardware reset). 6 - Reserved 5 WFSM Logic one indicates that new data is present in the Waveform Registers 4 PKI Logic one indicates that current channel has exceeded the IPKLVL value 3 PKV Logic one indicates that voltage channel has exceeded the VPKLVL value. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
