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ADE7169ASTF16 数据表(PDF) 96 Page - Analog Devices

部件名 ADE7169ASTF16
功能描述  Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
PDF  140 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE7169ASTF16 数据表(HTML) 96 Page - Analog Devices

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ADE7169F16
Preliminary Technical Data
Rev. PrD | Page 96 of 140
FLASH MEMORY
FLASH MEMORY OVERVIEW
Flash memory is a type of non-volatile memory that is in-
circuit programmable. The default, erased, state of a byte of
flash memory is 0xFF. When a byte of flash memory is
programmed, the required bits change from one to zero. The
flash memory must be erased to turn the zeros back to ones.
However, a byte of flash memory cannot be erased individually.
The entire segment, or page, of flash memory that contains the
byte must be erased.
The ADE7169F16 provides 16kbytes of flash
program/information memory. This memory is segmented into
32 pages of 512 bytes each. So, to reprogram one byte of flash
memory, the 511 bytes in that page must be erased. The flash
memory can be erased by page or all at once in a mass erase.
There is a command to verify that a flash write operation has
completed successfully. The ADE7169F16 flash memory
controller also offers configurable flash memory protection.
The 16 kbytes of flash memory are provided on-chip to facilitate
code execution without any external discrete ROM device
requirements. The program memory can be programmed in-
circuit, using the serial download mode provided or using
conventional third party memory programmers.
Flash/EE Memory Reliability
The Flash memory arrays on the ADE7169F16 are fully
qualified for two key Flash/EE memory characteristics:
Flash/EE memory cycling endurance and Flash/EE memory
data retention.
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many program, read, and erase cycles. In real
terms, a single endurance cycle is composed of four
independent, sequential events:
1.
Initial page erase sequence
2.
Read/verify sequence
3.
Byte program sequence
4.
Second read/verify sequence
In reliability qualification, every byte in both the program and
data Flash/EE memory is cycled from 00H to FFH until a first
fail is recorded, signifying the endurance limit of the on-chip
Flash/EE memory.
As indicated in the specification table, the ADE7169F16 flash
memory endurance qualification has been carried out in
accordance with JEDEC Specification A117 over the industrial
temperature range of –40°C, +25°C and +85°C. The results
allow the specification of a minimum endurance figure over
supply and temperature of 100,000 cycles, with a minimum
endurance figure of 20,000 cycles of operation at 25°C.
Retention is the ability of the Flash memory to retain its
programmed data over time. Again, the parts have been qualified
in accordance with the formal JEDEC Retention Lifetime
Specification (A117) at a specific junction temperature (TJ =
55°C). As part of this qualification procedure, the Flash
memory is cycled to its specified endurance limit described
previously, before data retention is characterized. This means
that the Flash memory is guaranteed to retain its data for its full
specified retention lifetime every time the Flash memory is
reprogrammed. It should also be noted that retention lifetime,
based on an activation energy of 0.6 eV, derates with TJ as shown
in Figure 65.
40
60
70
90
TJ JUNCTION TEMPERATURE (°C)
250
200
150
100
50
0
50
80
110
300
100
ADI SPECIFICATION
100 YEARS MIN.
AT TJ = 55°C
Figure 65. Flash/EE Memory Data Retention
FLASH MEMORY ORGANIZATION
The 16kbytes of flash memory provided by the ADE7169F16
are segmented into 32 pages of 512 bytes each. It is up to the
user to decide which Flash memory he would like to allocate for
data memory. It is recommended that each page be dedicated
solely to program or data memory so that an instance does not
arise where the program counter is loaded with data memory
instead of an opcode from the program memory or where
program memory is erased to update a byte of data memory.



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