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VL6524 数据表(PDF) 9 Page - STMicroelectronics |
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VL6524 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 70 page ![]() VL6524/VS6524 Electrical interface 9/70 2 Electrical interface The device has 20 electrical connections as listed in Table 1. The physical orientation of the pins on the device is shown in Figure 36. Table 1. VL6524/VS6524 signal description Pad socket Pad name I/O Description 1 GND PWR Analogue ground 2 D02 OUT Data output D2 3 D03 OUT Data output D3 4 HSYNC OUT Horizontal synchronization output 5 VSYNC OUT Vertical synchronization output 6 D07 OUT Data output D7 7 D06 OUT Data output D6 8 D05 OUT Data output D5 9 D04 OUT Data output D4 10 CLK IN Clock input - 6.5MHz to 26 MHz 11 GND PWR Digital ground 12 FSO OUT Flash output 13 CE IN Chip enable signal active HIGH 14 SCL IN I²C clock input 15 SDA I/O I²C data line 16 AVDD PWR Analogue supply 2.4 V to 3.0 V 17 D01 OUT Data output D1 18 D00 OUT Data output D0 19 PCLK OUT Pixel qualification clock 20 VDD PWR Digital supply 1.8 V OR 2.8 V |
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