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MPC8560CPXAPDB 数据表(PDF) 37 Page - Freescale Semiconductor, Inc

部件名 MPC8560CPXAPDB
功能描述  Integrated Processor Hardware Specifications
PDF  108 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC8560CPXAPDB 数据表(HTML) 37 Page - Freescale Semiconductor, Inc

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MPC8560 Integrated Processor Hardware Specifications, Rev. 3.1
Freescale Semiconductor
37
Local Bus
8Local Bus
This section describes the DC and AC electrical specifications for the local bus interface of the MPC8560.
8.1 Local Bus DC Electrical Characteristics
Table 29 provides the DC electrical characteristics for the local bus interface.
8.2 Local Bus AC Electrical Specifications
Table 30 describes the general timing parameters of the local bus interface of the MPC8560 with the DLL enabled.
Table 29. Local Bus DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2
OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
Input current
(VIN
1 = 0 V or V
IN = VDD)
IIN
—
±5
µA
High-level output voltage
(OVDD = min, IOH = –2 mA)
VOH
OVDD - 0.2
—
V
Low-level output voltage
(OVDD = min, IOL = 2 mA)
VOL
—
0.2
V
Note:
1.Note that the symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2.
Table 30. Local Bus General Timing Parameters - DLL Enabled
Parameter
POR Configuration
Symbol 1
Min
Max
Unit
Notes
Local bus cycle time
tLBK
6.0
—
ns
2
LCLK[n] skew to LCLK[m] or
LSYNC_OUT
tLBKSKEW
—
150
ps
3
Input setup to local bus clock
(except LUPWAIT)
tLBIVKH1
1.8
—
ns
4, 5, 8
LUPWAIT input setup to local bus
clock
tLBIVKH2
1.7
—
ns
4, 5
Input hold from local bus clock
(except LUPWAIT)
tLBIXKH1
0.5
—
ns
4, 5, 8
LUPWAIT input hold from local bus
clock
tLBIXKH2
1.0
—
ns
4, 5
LALE output transition to LAD/LDP
output transition (LATCH hold time)
tLBOTOT
1.5
—
ns
6
Local bus clock to output valid
(except LAD/LDP and LALE)
TSEC2_TXD[6:5] = 00
tLBKHOV1
—
2.0
ns
8
TSEC2_TXD[6:5] = 11
(default)
3.5



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