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MPC8560CPXAPDB 数据表(PDF) 48 Page - Freescale Semiconductor, Inc |
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MPC8560CPXAPDB 数据表(HTML) 48 Page - Freescale Semiconductor, Inc |
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48 / 108 page ![]() MPC8560 Integrated Processor Hardware Specifications, Rev. 3.1 48 Freescale Semiconductor CPM Figure 27 shows the SCC/SPI external clock. Figure 27. SCC/SPI AC Timing External Clock Diagram Figure 28 shows the SCC/SPI internal clock. Figure 28. SCC/SPI AC Timing Internal Clock Diagram Figure 29 shows TDM input and output signals. Figure 29. TDM Signal AC Timing Diagram Serial Clock In tNEIXKH tNEIVKH tNEKHOX Input Signals: SCC/SPI (See Note) Output Signals: SCC (See Note) Note: The clock edge is selectable on SCC and SPI. tSEKHOX Output Signals: SPI (See Note) BRG_OUT tNIIXKH tNIKHOX Input Signals: SCC/SPI (See Note) Output Signals: SCC/SPI (See Note) Note: The clock edge is selectable on SCC and SPI. tNIIVKH Serial Clock In tTDKHOX TDM Input Signals There are 4 possible TDM timing conditions: tTDIVKH tTDIXKH TDM Output Signals Note: 1. 2. 3. 4. Input sampled on the rising edge and output driven on the rising edge (shown). Input sampled on the rising edge and output driven on the falling edge. Input sampled on the falling edge and output driven on the falling edge. Input sampled on the falling edge and output driven on the rising edge. |
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