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MPC8560CPXAPDB 数据表(PDF) 98 Page - Freescale Semiconductor, Inc |
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MPC8560CPXAPDB 数据表(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 108 page ![]() MPC8560 Integrated Processor Hardware Specifications, Rev. 3.1 98 Freescale Semiconductor System Design Information Figure 59. Driver Impedance Measurement The output impedance of the RapidIO port drivers targets 200- Ω differential resistance. The value of this resistance and the strength of the driver’s current source can be found by making two measurements. First, the output voltage is measured while driving logic 1 without an external differential termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured while driving logic 1 with an external precision differential termination resistor of value Rterm. The measured voltage is V2 = 1/(1/R1 + 1/R2)) × Isource. Solving for the output impedance gives Rsource = Rterm × (V1/V2 – 1). The drive current is then Isource = V1/Rsource. Table 60 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD, nominal OVDD, 105°C. 17.6 Configuration Pin Muxing The MPC8560 provides the user with power-on configuration options which can be set through the use of external pull-up or pull-down resistors of 4.7 k Ω on certain output pins (see customer visible configuration pins). These pins are generally used as output only pins in normal operation. While HRESET is asserted however, these pins are treated as inputs. The value presented on these pins while HRESET is asserted, is latched when HRESET deasserts, at which time the input receiver is disabled and the I/O circuit takes on its normal function. Most of these sampled configuration pins are equipped with an on-chip gated Table 60. Impedance Characteristics Impedance Local Bus, Ethernet, DUART, Control, Configuration, Power Management PCI/PCI-X DDR DRAM RapidIO Symbol Unit RN 43 Target 25 Target 20 Target NA Z0 W RP 43 Target 25 Target 20 Target NA Z0 W Differential NA NA NA 200 Target ZDIFF W Note: Nominal supply voltages. See Table 1, Tj = 105°C. OVDD OGND RP RN Pad Data SW1 SW2 |
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