AD9983ASLASHPCB datasheet(35/44 Pages) AD

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Preliminary Technical Data

AD9983A

Rev. PrA | Page 35 of 44

INPUT AND POWER CONTROL

0x1E—Bit[7] Channel Select Override

This bit provides an override to the automatic input channel

selection. Power-up default setting is 0.

Table 43. Channel Source Override

Override

Result

Channel input source determined by chip

Channel input source determined by user

0x1E—Bit[6] Channel Select

This bit selects the active input channel if Register 0x1E, Bit 7 = 1.

This selects between Channel 0 data and syncs or Channel 1

data and syncs. Power-up default setting is 0.

Table 44. Channel Select

Channel Select

Result

Channel 0 data and syncs are selected

Channel 1 data and syncs are selected

0x1E—Bit[5] Programmable Bandwidth

This bit selects between a low or high input bandwidth. It is

useful in limiting noise for lower frequency inputs. The power-

up default setting is 1. Low analog input bandwidth is ~100 MHz;

high analog input bandwidth is ~200 MHz.

Table 45. Input Bandwidth Select.

Input Bandwidth

Result

Low analog input bandwidth

High analog input bandwidth

0x1E—Bit[4] Power-Down Control Select

This bit determines whether power-down is controlled

manually or automatically by the chip. If automatic control is

selected (Register 0x1E, Bit 4), the AD9983A decision is based

on the status of the sync detect bits (Register 0x24, Bit 2, Bit 3,

Bit 6, and Bit 7). If either an Hsync or a sync-on-green input is

detected on any input, the chip powers up or powers down. For

manual control, the AD9983A allows the flexibility of control

through both a dedicated pin and a register bit. The dedicated

pin allows a hardware watchdog circuit to control power-down,

while the register bit allows power-down to be controlled by

software. With manual power-down control, the polarity of the

power-down pin must be set (Register 0x1E, Bit 2) whether it is

used or not. If unused, it is recommended to set the polarity to

active high and hardwire the pin to ground with a 10 kΩ resistor.

Table 46. Auto Power-Down Select.

Power-Down Select

Result

Manual power-down control

(user determines power-down)

Auto power-down control

(chip determines power-down)

0x1E—Bit[3] Power-Down

This bit is used to manually place the chip in power-down

mode. It is only used if manual power-down control is selected

(see Bit 4 above). Both the state of this register bit and the

power-down pin (Pin 17) are used to control manual power-

down. (See the Power Management section for more details on

power-down.)

Table 47. Power-Down Settings

Power-Down Select

Pin 17

Result

Normal operation

Power-down

0x1E—Bit[2] Power-Down Pin Polarity

This bit defines the polarity of the power-down pin (Pin 17). It

is only used if manual power-down control is selected (see

0x1E—Bit[4] Power-Down Control Select).

Table 48. Power-Down Pin Polarity

Select

Result

Power-down pin is active low

Power-down pin is active high

0x1E—Bit[1] Power-Down Fast Switching Control

This bit controls a special fast switching mode. With this bit the

AD9983A can stay active during power-down and only put the

outputs in high impedance. This option is useful when the data

outputs from two chips are connected on a PCB and the user

wants to switch instantaneously between the two.

Table 49. Power-Down Fast Switching Control

Fast Switching Control

Result

Normal power-down operation

The chip stays powered up and the

outputs are put in high impedance

mode

0x1E—Bit[0] SOGOUT High Impedance Control

This bit controls whether the SOGOUT pin is in high

impedance or not, when in power-down mode. In most cases,

SOGOUT is not put in high impedance during normal oper-

ation. It is usually needed for sync detection by the graphics

controller. The option to put SOGOUT in high impedance is

included mainly to allow for factory testing modes.

Table 50. SOGOUT High Impedance Control

SOGOUT Control

Result

SOGOUT operates as normal during

power-down

SOGOUT is in high impedance

during power-down

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