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AD9983A/PCB 数据表(PDF) 15 Page - Analog Devices

部件名 AD9983A/PCB
功能描述  High Performance 8-Bit Display Interface
PDF  44 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9983A/PCB 数据表(HTML) 15 Page - Analog Devices

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Preliminary Technical Data
AD9983A
Rev. PrA | Page 15 of 44
The polarity of the coast signal may be set through the coast
polarity register (Register 0x18, Bits[6:5]). Also, the polarity of
the Hsync signal can be set through the Hsync polarity register
(Register 0x12, Bits[5:4]). For both Hsync and coast, a value of 1
is active high. The internal coast function is driven off the
Vsync signal, which is typically a time when Hsync signals may
be disrupted with extra equalization pulses.
Table 10. Recommended VCO Range and Charge Pump and Current Settings for Standard Display Formats
Standard
Resolution
Refresh Rate
(Hz)
Horizontal
Frequency (kHz)
Pixel Rate (MHz)
PLL Divider
VCO
Range
Current
VCO Gear
(R0x36[0])
VGA
640 × 480
60
31.500
25.175
800
00
101
0
72
37.700
31.500
832
01
100
0
75
37.500
31.500
840
01
100
0
85
43.300
36.000
832
01
100
0
SVGA
800 × 600
56
35.100
36.000
1024
01
100
0
60
37.900
40.000
1056
01
101
0
72
48.100
50.000
1040
01
101
0
75
46.900
49.500
1056
01
101
0
85
53.700
56.250
1048
01
110
0
XGA
1024 × 768
60
48.400
65.000
1344
10
100
0
70
56.500
75.000
1328
10
101
0
75
60.000
78.750
1312
10
101
0
80
64.000
85.500
1336
10
101
0
85
68.300
94.500
1376
10
110
0
SXGA
1280 × 1024
60
64.000
108.000
1688
10
110
0
75
80.000
135.000
1688
11
110
0
85
91.100
157.500
1728
11
110
0
UXGA
1600 × 1200
60
75.000
162.000
2160
11
110
0
TV
480i
30
15.750
13.510
858
00
101
1
480p
60
31.470
27.000
858
00
101
0
576i
30
15.625
13.500
864
00
101
1
576p
60
31.250
27.000
864
00
101
0
720p
60
45.000
74.250
1650
10
101
0
1035i
30
33.750
74.250
2200
10
101
0
1080i
60
33.750
74.250
2200
10
101
0
1080p
60
67.500
148.500
2200
11
101
0



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