AD9983ASLASHPCB datasheet(40/44 Pages) AD

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AD9983A

Preliminary Technical Data

Rev. PrA | Page 40 of 44

PCB LAYOUT RECOMMENDATIONS

The AD9983A is a high precision, high speed analog device.

To achieve the maximum performance from the part, it is

important to have a well laid-out board. The Analog Interface

Inputs section provides a guide for designing a board using

the AD9983A.

ANALOG INTERFACE INPUTS

Using the following layout techniques on the graphics inputs is

extremely important:

•

Minimize the trace length running into the graphics

inputs. This is accomplished by placing the AD9983A as

close as possible to the graphics VGA connector. Long

input trace lengths are undesirable because they pick up

noise from the board and other external sources.

•

Place the 75 Ω termination resistors (see Figure 4) as close

as possible to the AD9983A chip. Any additional trace

length between the termination resistors and the input of

the AD9983A increases the magnitude of reflections,

which corrupts the graphics signal.

•

Use 75 Ω matched impedance traces. Trace impedances

other than 75 Ω also increase the chance of reflections.

•

The AD9983A has a very high input bandwidth, (200 MHz).

While this is desirable for acquiring a high resolution PC

graphics signal with fast edges, it also means that it captures

any high frequency noise present. Therefore, it is important

to reduce the amount of noise coupled to the inputs. Avoid

running any digital traces near the analog inputs.

•

Due to the high bandwidth of the AD9983A, sometimes

low-pass filtering the analog inputs can help to reduce

noise. (For many applications, filtering is unnecessary.)

Experiments have shown that placing a ferrite bead in

series prior to the 75 Ω termination resistor is helpful in

filtering excess noise. Specifically, the Fair-Rite

#2508051217Z0 was used, but an application could work

best with a different bead value. Alternatively, placing a

100 Ω to 120 Ω resistor between the 75 Ω termination

resistor and the input coupling capacitor is beneficial.

Power Supply Bypassing

It is recommended to bypass each power supply pin with a

0.1 μF capacitor. The exception is where two or more supply

pins are adjacent to each other. For these groupings of

powers/grounds, it is only necessary to have one bypass

capacitor. The fundamental idea is to have a bypass capacitor

within about 0.5 cm of each power pin. Also, avoid placing the

capacitor on the opposite side of the PC board from the

AD9983A, since that interposes resistive vias in the path.

The bypass capacitors should be physically located between the

power plane and the power pin. Current should flow from the

power plane to the capacitor to the power pin. Do not make the

power connection between the capacitor and the power pin.

Placing a via underneath the capacitor pads, down to the power

plane, is generally the best approach.

It is particularly important to maintain low noise and good

stability of the PVD (the clock generator supply). Abrupt

changes in PVD can result in similarly abrupt changes in

sampling clock phase and frequency. This can be avoided with

careful attention to regulation, filtering, and bypassing. It is

highly desirable to provide separate regulated supplies for each

of the analog circuitry groups (VD and PVD).

Some graphic controllers use substantially different levels of

power when active (during active picture time) and when idle

(during horizontal and vertical sync periods). This can result in

a measurable change in the voltage supplied to the analog

supply regulator, which can in turn produce changes in the

regulated analog supply voltage. This can be mitigated by

regulating the analog supply, or at least PVD, from a different,

cleaner, power source (for example, from a 12 V supply).

It is also recommended to use a single ground plane for the

entire board. Experience has repeatedly shown that the noise

performance is the same or better with a single ground plane.

Using multiple ground planes can be detrimental because each

separate ground plane is smaller and long ground loops can result.

In some cases, using separate ground planes is unavoidable. For

those cases, it is recommended to at least place a single ground

plane under the AD9983A. The location of the split should be at

the receiver of the digital outputs. In this case it is even more

important to place components wisely because the current

loops will be much longer, (current takes the path of least

resistance). An example of a current loop is power plane to

AD9983A to digital output trace to digital data receiver to

digital ground plane to analog ground plane.

PLL

Place the PLL loop filter components as close to the FILT pin as

possible. Do not place any digital or other high frequency traces

near these components. Use the values suggested in the data-

sheet with 10% tolerances or less.

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