
Specification
NET2270 USB Interface Controller
______________________________________________________________________________
NetChip Technology, Inc., 2003
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 3.6, April 17, 2003
3
NET2270 USB Interface Controller
1
INTRODUCTION .................................................................................................................................7
1.1
FEATURES.........................................................................................................................................7
1.2
OVERVIEW........................................................................................................................................7
1.3
NET2270 BLOCK DIAGRAM.............................................................................................................9
1.4
NET2270 TYPICAL SYSTEM BLOCK DIAGRAMS ..............................................................................9
1.4.1
Example connections to NET2270.........................................................................................11
1.4.2
Example Part Numbers..........................................................................................................12
1.4.3
General PCB Layout Guidelines ...........................................................................................12
1.4.3.1
USB Differential Signals ..................................................................................................................12
1.4.3.2
Analog VDD (power)........................................................................................................................12
1.4.3.3
Analog VSS (ground)........................................................................................................................13
1.4.3.4
Decoupling Capacitors......................................................................................................................13
1.4.3.5
EMI Noise Suppression ....................................................................................................................13
1.5
TERMINOLOGY ...............................................................................................................................14
2
PIN DESCRIPTION............................................................................................................................15
2.1
DIGITAL POWER & GROUND (9 PINS) .............................................................................................15
2.2
USB TRANSCEIVER (15 PINS).........................................................................................................16
2.3
CLOCKS, RESET, MISC. (9 PINS) .....................................................................................................17
2.4
LOCAL BUS PIN DESCRIPTIONS (31 PINS) .......................................................................................18
2.5
PHYSICAL PIN ASSIGNMENT ...........................................................................................................19
3
RESET AND INITIALIZATION ......................................................................................................20
3.1
OVERVIEW......................................................................................................................................20
3.2
RESET# PIN ..................................................................................................................................20
3.3
ROOT PORT RESET..........................................................................................................................20
3.4
RESET SUMMARY ...........................................................................................................................20
4
LOCAL BUS INTERFACE................................................................................................................21
4.1
INTRODUCTION...............................................................................................................................21
4.2
REGISTER ADDRESSING MODES .....................................................................................................21
4.2.1
Direct Address Mode .............................................................................................................21
4.2.2
Indirect Address Mode...........................................................................................................21
4.2.3
Multiplexed Address Mode ....................................................................................................21
4.3
CONTROL SIGNAL DEFINITIONS......................................................................................................21
4.4
BUS WIDTH / BYTE ALIGNMENT ....................................................................................................21
4.5
I/O TRANSACTIONS ........................................................................................................................22
4.5.1
Non-Multiplexed I/O Read.....................................................................................................22
4.5.2
Multiplexed I/O Read.............................................................................................................22
4.5.3
Non-Multiplexed I/O Write ....................................................................................................23
4.5.4
Multiplexed I/O Write ............................................................................................................23
4.5.5
I/O Performance ....................................................................................................................24
4.5.5.1
Non-Multiplexed Read Transaction ..................................................................................................24
4.5.5.2
Multiplexed Read Transaction ..........................................................................................................24
4.5.5.3
Non-Multiplexed Write Transaction .................................................................................................24
4.5.5.4
Multiplexed Write Transaction .........................................................................................................24
4.6
DMA TRANSACTIONS ....................................................................................................................25
4.6.1
DMA Read .............................................................................................................................25
4.6.2
DMA Write.............................................................................................................................26
4.6.3
DMA Split Bus Mode .............................................................................................................28
4.6.4
Terminating DMA Transfers..................................................................................................28