Specification
NET2270 USB Interface Controller
______________________________________________________________________________
NetChip Technology, Inc., 2003
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 3.6, April 17, 2003
5
8.2
REGISTER SUMMARY......................................................................................................................47
8.2.1
Main Control Registers..........................................................................................................47
8.2.2
USB Control Registers...........................................................................................................48
8.2.3
Endpoint Registers.................................................................................................................48
8.3
NUMERIC REGISTER LISTING..........................................................................................................49
8.4
MAIN CONTROL REGISTERS ...........................................................................................................50
8.4.1
(Address 00h; REGADDRPTR) Indirect Register Address Pointer ......................................50
8.4.2
(Address 01h; REGDATA) Indirect Register Data ................................................................50
8.4.3
(Address 02h; IRQSTAT0) Interrupt Status Register (low byte)............................................50
8.4.4
(Address 03h; IRQSTAT1) Interrupt Status Register (high byte) ..........................................51
8.4.5
(Address 04h; PAGESEL) Endpoint Page Select Register ....................................................51
8.4.6
(Address 1Ch; DMAREQ) DMA Request Control Register...................................................52
8.4.7
(Address 1Dh; SCRATCH) Scratchpad Register...................................................................52
8.4.8
(Address 20h; IRQENB0) Interrupt Enable Register (low byte) ...........................................53
8.4.9
(Address 21h; IRQENB1) Interrupt Enable Register (high byte) ..........................................53
8.4.10
(Address 22h; LOCCTL) Local Bus Control Register ...........................................................54
8.4.11
(Address 23h; CHIPREV) Silicon Revision Register.............................................................54
8.5
USB CONTROL REGISTERS.............................................................................................................55
8.5.1
(Address 18h; USBCTL0) USB Control Register (low byte) .................................................55
8.5.2
(Address 19h; USBCTL1) USB Control Register (high byte)................................................55
8.5.3
(Address 1Ah; FRAME0) Frame Counter (low byte) ............................................................55
8.5.4
(Address 1Bh; FRAME1) Frame Counter (high byte) ...........................................................55
8.5.5
(Address 30h; OURADDR) Our Current USB Address ........................................................56
8.5.6
(Address 31h; USBDIAG) USB Diagnostic Register.............................................................56
8.5.7
(Address 32h; USBTEST) USB Test Modes...........................................................................56
8.5.8
(Address 33h; XCVRDIAG) Transceiver Diagnostic Register ..............................................57
8.5.9
(Address 40h; SETUP0) Setup Byte 0....................................................................................57
8.5.10
(Address 41h; SETUP1) Setup Byte 1....................................................................................58
8.5.11
(Address 42h; SETUP2) Setup Byte 2....................................................................................58
8.5.12
(Address 43h; SETUP3) Setup Byte 3....................................................................................58
8.5.13
(Address 44h; SETUP4) Setup Byte 4....................................................................................58
8.5.14
(Address 45h; SETUP5) Setup Byte 5....................................................................................58
8.5.15
(Address 46h; SETUP6) Setup Byte 6....................................................................................59
8.5.16
(Address 47h; SETUP7) Setup Byte 7....................................................................................59
8.6
ENDPOINT REGISTERS.....................................................................................................................60
8.6.1
(Address 05h; EP_DATA) Endpoint Data .............................................................................60
8.6.2
(Address 06h; EP_STAT0) Endpoint Status Register (low byte) ...........................................60
8.6.3
(Address 07h; EP_STAT1) -- Endpoint Status Register (high byte) ......................................61
8.6.4
(Address 08h; EP_TRANSFER0) Transfer Count Register (Byte 0) .....................................62
8.6.5
(Address 09h; EP_TRANSFER1) Transfer Count Register (Byte 1) .....................................62
8.6.6
(Address 0Ah; EP_TRANSFER2) Transfer Count Register (Byte 2).....................................62
8.6.7
(Address 0Bh; EP_IRQENB) Endpoint Interrupt Enable Register .......................................63
8.6.8
(Address 0Ch: EP_AVAIL0) Endpoint Available Count (low byte) ......................................63
8.6.9
(Address 0Dh: EP_AVAIL1) Endpoint Available Count (high byte).....................................63
8.6.10
(Address 0Eh; EP_RSPCLR) Endpoint Response Register Clear .........................................64
8.6.11
(Address 0Fh; EP_RSPSET) Endpoint Response Register Set..............................................65
8.6.12
(Address 28h; EP_MAXPKT0) Max Packet Size (low byte)..................................................65
8.6.13
(Address 29h; EP_MAXPKT1) Max Packet Size (high byte) ................................................65
8.6.14
(Address 2Ah; EP_CFG) Endpoint Configuration Register..................................................66
9
USB STANDARD DEVICE REQUESTS .........................................................................................67
9.1
CONTROL ‘READ’ TRANSFERS........................................................................................................68
9.1.1
Get Device Status...................................................................................................................68
9.1.2
Get Interface Status ...............................................................................................................68
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