Specification
NET2270 USB Interface Controller
______________________________________________________________________________
NetChip Technology, Inc., 2003
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 3.6, April 17, 2003
64
8.6.10 (Address 0Eh; EP_RSPCLR) Endpoint Response Register Clear
Note: Writing a 1 to bits 7:0 clears the corresponding register bits.
Bits
Description
Read
Write
Default
Value
7
Alt NAK OUT Packets. This bit is set when a short data packet is received from the
host by this endpoint, and the NAK OUT Packets Mode bit is set. If this bit is set and
another OUT token is received, a NAK is returned to the host if another OUT packet
is sent to this endpoint. This bit can also be cleared by a bit in the EP_STAT0
register.
Yes
Yes/Clr
0
6
Hide Status Phase.
When set, the DATA Packet Received and Data Packet
Transmitted interrupts for status phase packets are not set.
Yes
Yes/Clr
0
5
Auto Validate. When set, this bit allows automatic validation of maximum length
packets and automatic release of empty OUT buffers. This is the normal mode of
operation for endpoint transactions and is the default state for this bit. When this bit
is clear, IN packets are manually validated by writing a zero to the EP_TRANSFER
register. OUT packets can be manually released by setting this bit high, then low.
Yes
Yes/Clr
1
4
Interrupt Mode. This bit is only used for INTERRUPT endpoints. For normal
interrupt data, this bit should be set to zero and standard data toggle protocol is
followed. When this interrupt endpoint is used for isochronous rate feedback
information, this bit should be set high. In this mode the data toggle bit is changed
after each packet is sent to the host without regard to handshaking. No packet retries
are performed in the rate feedback mode.
Yes
Yes/Clr
0
3
Control Status Phase Handshake. This bit is only used for endpoint 0. This bit is
automatically set when a setup packet is detected. While the bit is set, a control
status phase will be acknowledged with a NAK. Once cleared, the proper response
will be returned to the host (ACK for Control Reads and zero-length packets for
Control Writes).
Yes
Yes/Clr
0
2
NAK OUT Packets Mode. This bit is only used for OUT endpoints. When NAK
OUT Packets Mode is true,
the NAK OUT Packets bit is set whenever a short packet
is received by this endpoint.
Yes
Yes/Clr
1
1
Endpoint Toggle. This bit is used to clear the endpoint data toggle bit. Reading this
bit returns the current state of the endpoint data toggle bit. Under normal operation,
the toggle bit is controlled automatically, so the local CPU does not need to use this
bit.
Yes
Yes/Clr
0
0
Endpoint Halt. This bit is used to clear the endpoint stall bit. When an Endpoint Set
Feature Standard Request to the halt bit is detected by the local CPU, it must write a
1 to this bit. Reading this bit returns the current state of the endpoint halt bit. For
Endpoint 0, the halt bit is automatically cleared when another Setup packet is
received.
Yes
Yes/Clr
0
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
