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S12SCIV2/D 数据表(PDF) 121 Page - Freescale Semiconductor, Inc

部件名 S12SCIV2/D
功能描述  Device User Guide V01.18
PDF  130 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

S12SCIV2/D 数据表(HTML) 121 Page - Freescale Semiconductor, Inc

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MC9S12H256 Device User Guide — V01.18
A.8 External Bus Timing
A timing diagram of the external multiplexed-bus is illustrated in Figure A-9 with the actual timing values
shown on table Table A-20. All major bus signals are included in the diagram. While both a data write
and data read cycle are shown, only one or the other would occur on a particular bus cycle.
A.8.1 General Muxed Bus Timing
The expanded bus timings are highly dependent on the load conditions. The timing parameters shown
assume a balanced load across all outputs.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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